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PJ2
PA12
PF3
VSS
VSSA
PA5
VSS
PG2
VSS
PA13
PB8
PI15
PG3
PH14
VDD
VDD
PC13
VSS
PB15
VDD
VSS
PF7
PF6
PJ15
PB14
VDD
PI4
PG6
PJ13
PJ5
PC15
PJ7
VREF-
PDR_ON
VDDUSB
PC2
PF10
PF9
PG9
PK1
PG10
PK3
PA3
PK6
PE15
PK0
VDD
PF11
PD9
PE12
PH4
PI5
PD14
PI2
VBAT
PI3
VDD
PI10
VDD
PB10
PG8
PH8
VSS
PC14
PF1
PA1
VDD
PH0
PB9
PA6
PH7
PK5
PI12
PD4
VDD
PK7
PA11
PF0
PG12
PJ3
PF14
VDD
PB0
VCAP_2
PB4
PD7
PJ10
PF8
PC10
PD6
PJ4
VDD
VSS
PH15
PG11
PG13
PE11
PG1
PC1
PH13
PE6
PD5
VDD
PC12
PJ11
PF12
PJ14
PC6
PA9
PH1
PE8
PJ12
PK4
VSS
VSS
PI7
PE0
PF4
PG0
PE9
PA4
PC5
VSS
PI13
PD0
NRST
PA14
PB13
PF2
PA2
PH11
PB7
VDD
VSS
PI8
PB11
PA10
VDD
PD8
PE2
PE5
PG7
PD13
BOOT0
PC9
PC11
PJ1
PA15
PF15
PH3
PG15
PH10
PE13
PB12
PC3
BYPASS_REG
PA8
PK2
PH5
PD12
VREF+
PF5
VSS
PI9
PA0
PH9
PB2
PI1
VSS
PD10
PJ9
PE1
VDD
PH2
VSS
VSS
VDDSDMMC
VDD
PI14
PH12
PB3
PI6
VCAP_1
PD3
PC8
VSS
PG14
PC7
VDDA
PD15
PD1
PD11
PJ6
PI0
PG5
VSS
PE4
PC0
PA7
PB5
PC4
PJ8
PI11
PG4
PE14
PE7
PJ0
VSS
PD2
PE3
PB1
VDD
PF13
PB6
PE10
PH6

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Documents

    Documents are markdown text files which describe project goals, capture details, or even simulation outputs.

    Assets

    TFBGA-216_13x13mm_Layout15x15_P0.8mm.kicad_mod

    TFBGA-216_13x13mm_Layout15x15_P0 FootprintFootprint

    STM32F765N_G-I_Hx Symbol.svg

    STM32F765N_G-I_Hx SymbolDefault
    TFBGA-216_13x13mm_Layout15x15_P0.8mm.step

    TFBGA-216_13x13mm_Layout15x15_P0.8mm.step

    TFBGA-216_13x13mm_Layout15x15_P0 Model3D Model

    STM32F765N_G-I_Hx

    STM32F765N_G-I_Hx thumbnail
    STMicroelectronics Arm Cortex-M7 MCU, 1024-2048KB flash, 512KB RAM, 216 MHz, 1.7-3.6V, 168 GPIO, TFBGA216 Arm Cortex-M7 STM32F7 STM32F7x5 TFBGA13x13mmLayout15x15P0.8mm

    Properties

    STMicroelectronics NV

    U

    st.com/resource/en/datasheet/stm32f765ng.pdf

    STM32F765N_G-I_Hx

    TFBGA-216_13x13mm_Layout15x15_P0.8mm

    Pricing & Availability

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