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AVSS3
TA1.1/P3.2
P8.6/UCB1SOMI/UCB1SCL
DVSS3
P8.7
TA0.0/P1.1
PU.0
XOUT
PJ.1/TDI/TCLK
VSSU
GND
P6.7/CB7/A7
P9.4
GND
P9.3
TA0.1/P1.6
TA2.0/P3.5
P7.5/CB9/A13
P7.3/XT2OUT
P2MAP4/P2.4
TB0.6/P4.6
ADC12CLK/DMAE0/P5.6
P6.4/CB4/A4
P8.2/UCA1TXD/UCA1SIMO
TA0CLK/ACLK/P1.0
AVSS2
P6.0/CB0/A0
LDOO
TA1.2/P3.3
PJ.2/TMS
TA0.3/P1.4
P8.3/UCA1RXD/UCA1SOMI
P2MAP6/P2.6
VSSU
P9.5
P2MAP1/P2.1
DVSS2
VBAT
PJ.0/TDO
DVSS
TA2CLK/SMCLK/P3.4
TA0.2/P1.3
RTCCLK/P5.7
P8.5/UCB1SIMO/UCB1SDA
P6.6/CB6/A6
P7.7/CB11/A15
P7.6/CB10/A14
TB0.5/P4.5
TA1.0/P3.1
P7.4/CB8/A12
GND
TB0OUTH/SVMOUT/P4.7
P8.4/UCB1CLK/UCA1STE
P2MAP7/P2.7
TA2.1/P3.6
VCORE
DVCC3
TA0.4/P1.5
GND
P7.2/XT2IN
P6.2/CB2/A2
~{RST}/NMI/SBWTDIO
P5.3
TB0.3/P4.3
TEST/SBWTCK
P5.5
TB0.1/P4.1
TB0.4/P4.4
TA1CLK/CBOUT/P3.0
GND
DVCC2
AVCC1
DVCC1
P2MAP3/P2.3
VBAK
LDOI
P2MAP2/P2.2
VREF-/VeREF-/P5.1
P9.1
AVCC1
P8.0/TB0CLK
PJ.3/TCK
AVSS1
P9.0
TA2.2/P3.7
P8.1/UCB1STE/UCA1CLK
P2MAP0/P2.0
P6.5/CB5/A5
GND
VREF+/VeREF+/P5.0
P9.7
TB0.2/P4.2
PU.1
GND
P5.4
DVSS1
P6.3/CB3/A3
GND
XIN
P9.6
TA0.1/P1.2
GND
TA0.2/P1.7
P2MAP5/P2.5
GND
P9.2
TB0.0/P4.0
GND
P6.1/CB1/A1
P5.2

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    Documents are markdown text files which describe project goals, capture details, or even simulation outputs.

    Assets

    Texas_MicroStar_Junior_BGA-113_7.0x7.0mm_Layout12x12_P0.5mm.kicad_mod

    Texas_MicroStar_Junior_BGA-113_7 FootprintFootprint

    MSP430F5333IZQW Symbol.svg

    MSP430F5333IZQW SymbolDefault
    Texas_MicroStar_Junior_BGA-113_7.0x7.0mm_Layout12x12_P0.5mm.step

    Texas_MicroStar_Junior_BGA-113_7.0x7.0mm_Layout12x12_P0.5mm.step

    Texas_MicroStar_Junior_BGA-113_7 Model3D Model

    MSP430F5333IZQW

    MSP430F5333IZQW thumbnail
    128kB Flash, 10kB RAM, BGA-113 TI MSP430 16-bit mixed signal microcontroller TexasMicroStarJuniorBGA7.0x7.0mmLayout12x12P0.5mm*

    Properties

    Texas Instruments Inc.

    U

    ti.com/lit/ds/symlink/msp430f5333.pdf

    MSP430F5333IZQW

    Texas_MicroStar_Junior_BGA-113_7.0x7.0mm_Layout12x12_P0.5mm

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