Fathom-X WiFi Bridge Design

To get it manufactured now, use the exported files like this:
1. Order the bare PCB
Use the Gerber ZIP:
Upload that ZIP to a PCB manufacturer such as JLCPCB, PCBWay, Seeed Fusion, or Elecrow.
Recommended PCB settings:
  • Layers: 4-layer
  • Board size: 30 mm × 120 mm
  • Thickness: 1.6 mm unless you have enclosure constraints
  • Copper: 1 oz
  • Surface finish: ENIG preferred, HASL acceptable
  • Solder mask: any color
  • Impedance control: recommended if your fab supports it, because Ethernet/RMII pairs are present
2. If you want assembly, upload BOM + pick-and-place
For JLCPCB-style assembly, use:
If your manufacturer is not JLCPCB, use the Flux/standard BOM and OpenPNP pick-and-place files instead.
3. Before paying, check these previews
In the fab ordering page:
  1. Open the Gerber viewer.
  2. Confirm the board outline is 30 mm × 120 mm.
  3. Confirm the USB-C connector, tether terminal, and power terminal are at accessible edges.
  4. Confirm there are no obvious missing copper layers.
  5. For assembly, check pick-and-place rotations for:
    • ESP32-WROOM-32E
    • LAN8720A
    • CH340C
    • LX200V20 module/socket
    • UT11403S transformer
    • USB-C connector
    • polarized/special parts if any
4. Important: choose assembly scope carefully
Some parts may not be available through automated JLCPCB assembly, especially:
  • LX200V20
  • UT11403S
  • Possibly the 48V DC/DC converter module
  • Some high-voltage capacitors
Best practical approach:
  • Let the assembler place common SMD parts: resistors, capacitors, ESP32, LAN8720A, CH340C, USB-C, etc.
  • Hand-place or separately source specialty modules/parts: LX200V20, UT11403S, large DC/DC modules if unavailable.
5. After you receive the board
Follow the bring-up plan before connecting the full 48V tether system:
  • First power with current limit.
  • Verify 12V, 5V, 3.3V, and LX200V20 3.3V rails.
  • Program the ESP32 over USB-C.
  • Verify Ethernet PHY detection.
  • Then test tether/HomePlug link.
Do not connect the full tether power source first without current limiting.
is this a two layer or 4 layer board?
It is a 4-layer board.
Current layout setup:
  • Board size: 30 mm × 120 mm
  • Copper layers: 4
  • Stackup: Standard 4 Layer custom
  • Intended layer use:
    • Top: components + signals
    • Inner layer: ground reference plane
    • Inner layer: power / routing
    • Bottom: signals / routing
A 4-layer stackup is the right choice here because the board has Ethernet/RMII signals, USB, multiple power rails, and a narrow 30 mm form factor.
Export 4-layer files
Check stackup details
Fix package mismatches
Review impedance routing
Assembly guidance
T1
U6
Not Recommended for New Designs
U4
U6 RXP - C19 P1
U4 VDD2P0 - C11 P1
PS4 OUT - U4 3.3VD
U6 RXP - C19 P1
T1 PL_L - J2 1
J3 DP2 - U7 UD+
U4 TX+ - T1 TX+
J3 DN2 - U7 UD-
U2 IO18 - U6 MDIO
PS2 OUT - U1 VIN
PS4 OUT - U4 3.3VD
U6 VDDCR - C21 P1
U2 IO18 - U6 MDIO
U2 IO5 - R10 P2
U6 RBIAS - R8 P1
U7 V3 - C6 P1
T1 PL_L - J2 1
T1 PL_L - J2 1
U2 IO17 - U6 XTAL1/CLKIN
C20 P2 - U4 PETX_N
U2 IO19 - U6 TXD0
U7 ~RTS - U2 EN
U7 V3 - C6 P1
U2 IO45 - R3 P1
T1 PL_L - J2 1
PS4 OUT - U4 3.3VD
PS1 +VOUT - PS2 IN
J3 CC1 - R5 P1
U7 RXD - U2 TXD0/IO1
T1 PL_L - J2 1
U6 NRST - R11 P2
J1 PIN1 - PS1 +VIN
J3 CC1 - R5 P1
U2 IO25 - U6 RXD0/~MODE0
U4 TX- - T1 TX-
J1 PIN1 - PS1 +VIN
T1 PL_N - J2 2
U6 TXN - C18 P1
U7 V3 - C6 P1
U2 IO25 - U6 RXD0/~MODE0
U7 V3 - C6 P1
U4 RX+ - T1 RX+
J3 CC2 - R6 P1
PS1 +VOUT - PS2 IN
U6 NRST - R11 P2
C19 P2 - U4 PETX_P
PS1 +VOUT - PS2 IN
U1 VOUT - U1 CE
U6 RXN - C20 P1
T1 PL_N - J2 2
U4 TX- - T1 TX-
U2 IO5 - R10 P2
T1 PL_N - J2 2
U7 ~RTS - U2 EN
U7 V3 - C6 P1
U2 IO17 - U6 XTAL1/CLKIN
U4 RX- - T1 RX-
U2 IO27 - U6 CRS_DV/~MODE2
U6 RXN - C20 P1
U6 TXP - C17 P1
U7 RXD - U2 TXD0/IO1
U7 V3 - C6 P1
J1 PIN1 - PS1 +VIN
U7 V3 - C6 P1
U7 ~DTR - U2 IO0
C14 P2 - C13 P1
U2 IO26 - U6 RXD1/~MODE1
T1 PL_N - J2 2
C17 P2 - U4 PERX_P
C20 P2 - U4 PETX_N
C17 P2 - U4 PERX_P
U2 IO26 - U6 RXD1/~MODE1
U7 ~RTS - U2 EN
U2 IO22 - U6 TXD1
U2 IO22 - U6 TXD1
PS2 OUT - U1 VIN
U1 VOUT - U1 CE
U2 IO12 - R9 P1
U4 RX+ - T1 RX+
J3 DP2 - U7 UD+
C18 P2 - U4 PERX_N
U6 TXN - C18 P1
U2 IO21 - U6 TXEN
U6 VDD2A - U7 VCC
U7 ~DTR - U2 IO0
U6 RBIAS - R8 P1
U7 V3 - C6 P1
U7 TXD - U2 RXD0/IO3
U6 VDD2A - U7 VCC
U6 VDDCR - C21 P1
PS2 OUT - U1 VIN
U7 ~RTS - U2 EN
U4 VDD2P0 - C11 P1
U7 TXD - U2 RXD0/IO3
U1 VOUT - U1 CE
C19 P2 - U4 PETX_P
U2 IO23 - U6 MDC
C18 P2 - U4 PERX_N
U1 VOUT - U1 CE
U7 V3 - C6 P1
J3 DN2 - U7 UD-
U4 TX+ - T1 TX+
U4 RX- - T1 RX-
J3 CC2 - R6 P1
U2 IO27 - U6 CRS_DV/~MODE2
U2 IO46 - R4 P1
U7 ~DTR - U2 IO0
PS2 OUT - U1 VIN
U2 IO21 - U6 TXEN
C14 P2 - C13 P1
U7 V3 - C6 P1
PS1 +VOUT - PS2 IN
U6 TXP - C17 P1
U7 V3 - C6 P1
U2 IO19 - U6 TXD0
U2 IO12 - R9 P1
U2 IO23 - U6 MDC
U2 IO18 - U6 MDIO
U2 GND - U6 EP
J3 GND - C7 P2
GND
U2 GND - U6 EP
U2 GND - U6 EP
J3 GND - C7 P2
GND
GND
PS3 GND - U5 GND
J3 GND - C7 P2
U2 GND - U6 EP
U2 GND - U6 EP
GND
J3 GND - C7 P2
U3 GND - J3 GND
PS3 GND - U5 GND
PS3 GND - U5 GND
GND
GND
GND
U2 GND - U6 EP
GND
GND
GND
U2 GND - U6 EP
GND
GND
PS3 GND - U5 GND
J3 GND - C7 P2
GND
U2 GND - U6 EP
PS3 GND - U5 GND
PS3 GND - U5 GND
GND
J3 GND - C7 P2
GND
C5
Capacitance
4.7uF
R1
Resistance
10kΩ
C16
Capacitance
4.7uF
R6
Resistance
5.1kΩ
R9
Resistance
10kΩ
R12
Resistance
1.5kΩ
C21
Capacitance
1uF
R2
Resistance
10kΩ
C17
End of Life
Capacitance
0.1uF
C2
Capacitance
22uF
R8
Resistance
12.1kΩ
C13
Capacitance
0.1uF
R3
Resistance
10kΩ
C11
End of Life
Capacitance
0.1uF
C3
Capacitance
10uF
C12
Not Recommended for New Designs
Capacitance
330pF
R11
Resistance
10kΩ
R7
Resistance
10Ω
R4
Resistance
10kΩ
C19
End of Life
Capacitance
0.1uF
C8
End of Life
Capacitance
100nF
C20
End of Life
Capacitance
0.1uF
C10
Capacitance
10uF
C18
End of Life
Capacitance
0.1uF
C14
Capacitance
0.01uF
C6
End of Life
Capacitance
100nF
C7
Capacitance
1uF
R10
Resistance
10kΩ
C15
End of Life
Capacitance
100nF
R5
Resistance
5.1kΩ
C1
Capacitance
4.7uF
C4
Capacitance
1uF
U2
U7
J2
J3
PS4
PS2
U1
J1
PS1
D2

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Project Specification
Design Summary
Status: Draft / Review / Approved
Manufacturing target: Prototype / EVT / DVT / PVT / Production
Software / firmware: repository link

Scope
Purpose
In scope
Out of scope

System context

Requirements
Functional
Electrical
Mechanical / environmental

Key constraints

Dependencies and risks
Dependencies
Key risks

Validation
Success criteria
Planned checks

Release-facing notes
Expected deliverables
Special release notes

Change notes / open questions
Changes in this revision
Open questions
  • Design Summary

  • Scope

  • System context

  • Requirements

  • Functional

  • Electrical

  • Mechanical / environmental

  • Key constraints

  • Dependencies and risks

  • Validation

  • Release-facing notes

  • Change notes / open questions

Documents

  • Project Specification

  • Power Budget — Fathom-X ESP32 WiFi Bridge

  • Firmware Starter — ESP32-WROOM-32E Fathom-X WiFi Bridge

  • Board Bring-Up Plan — Fathom-X ESP32 WiFi Bridge

  • Technical Construction File — Fathom-X ESP32 WiFi Bridge

  • Fathom-X Recreation Notes

Assets

No assets added.

Fathom-X ESP32 WiFi Bridge

Fathom-X ESP32 WiFi Bridge thumbnail
48V tether-powered Ethernet-to-WiFi bridge using Blue Robotics Fathom-X style tether interface and ESP32-S3 WiFi output, with isolated/buck DC/DC rails for the tether interface and ESP32.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$55.67–$60.36

Digi-Key

$63.36–$63.36

HQonline

$3.13

LCSC

$71.18–$73.07

Mouser

$67.12

TME

$1.49

Verical

$46.58–$336.78

Controls