Soil Moisture Probe Design

Best manual routing order for the 14 airwires
For this probe, the best order is to route by function and sensitivity, not randomly. In general, routing should prioritize net classes deliberately rather than one-by-one ad hoc; the project-modification guidance explicitly calls out routing by inferred net type and prioritization order . Since your board is a narrow sensor probe with a capacitive front end, I’d use this order:
1. Route the sensor-critical nets first
  • SENSE_A
  • SHIELD
These are the most sensitive nets and should get the shortest, cleanest paths with the most control over nearby copper. If you route power and digital first, you’ll box yourself in and force these onto noisier paths later.
Guidelines
  • Keep SENSE_A as short and direct as possible from U1 toward the sensing structure.
  • Route SHIELD to surround or guard SENSE_A only where intentional.
  • Avoid vias if possible.
  • Keep these nets away from SDA, SCL, 1WIRE, and any broad ground copper.
2. Route power next
  • 3V3
  • GND
Once the sensitive analog path is protected, lock in the supply distribution. This keeps decoupling loops compact and avoids awkward detours later.
Guidelines
  • Route J1 to U1 and U2 first.
  • Make the paths to C1 and C2 very short.
  • Keep return paths compact on the component half of the board.
3. Route the I2C bus after power
  • SDA
  • SCL
These are low-speed digital nets, but they are shared bus lines and should still be kept tidy and parallel only where necessary.
Guidelines
  • Route from J1 to U1, with short branches to R1 and R2.
  • Keep them away from SENSE_A and SHIELD.
  • Don’t snake them through the sensing-region boundary.
4. Route the 1-Wire net last
  • 1WIRE
This is usually the easiest remaining signal once analog, power, and bus routing are settled.
Guidelines
  • Route J1 to U2 with the pull-up at R3.
  • Keep it compact, but it does not need the same priority as the capacitive sensing net.

Practical airwire-clearing sequence
If you want a concrete hand-routing sequence, do it in this order:
  1. U1 SENSE_A
  2. U1 SHIELD
  3. J1 3V3 to local supply area
  4. 3V3 branches to U1, U2, C1, C2, R1, R2, R3
  5. GND return connections for U1, U2, C1, C2
  6. J1 to U1 SDA
  7. J1 to U1 SCL
  8. Short pull-up branches to R1 and R2
  9. J1 to U2 1WIRE
  10. Short pull-up branch to R3

Placement-aware tip
Because placement quality strongly affects trace length and routing success, it’s good practice to keep supporting parts clustered near their ICs and connectors at the edge before routing . For your board, that means:
Rule of thumb
  • Analog sensor nets first
  • Power second
  • Digital bus third
  • Lowest-priority digital last
If you want, I can turn this into a pin-by-pin routing checklist for J1, U1, and U2 so you can clear the 14 airwires in order without guessing.
Make pin checklist
Suggest rerouting moves
Review DRC issues
J1
U2 DQ - R3 P2
U1 SCL - R2 P2
U1 VDD - U2 VDD
U1 SHLD1 - U1 SHLD2
U1 SDA - R1 P2
SENSE_A
U1 VDD - U2 VDD
U2 DQ - R3 P2
U1 SCL - R2 P2
U1 VDD - U2 VDD
U2 DQ - R3 P2
U1 SDA - R1 P2
U1 SHLD1 - U1 SHLD2
U1 SDA - R1 P2
U1 VDD - U2 VDD
U1 VDD - U2 VDD
U1 VDD - U2 VDD
U1 VDD - U2 VDD
U1 SCL - R2 P2
U1 VDD - U2 VDD
GND
GND
GND
R3
Resistance
4.7kΩ
GND
U1
C2
Capacitance
100nF
R1
Resistance
4.7kΩ
C1
Capacitance
100nF
U2
R2
Resistance
4.7kΩ
GND

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Design Notes
Current manufacturing-finalization status
  • Project schematic is preserved and should not be changed.
  • Existing passive footprints in the current PCB layout already resolve to SMD_0402_1005Metric for R1, R2, R3, C1, and C2.
  • Current board outline is 160 mm x 100 mm and current stackup is standard-4-layer, 1.30 mm total thickness.
  • Outstanding DRC shows 14 airwire errors.
Requested physical targets
  • Convert to JLCPCB standard 2-layer.
  • Board thickness target: 0.8 mm.
  • Define a bottom 100 mm sensing region with interdigitated traces on both copper layers, 1 mm width / 1 mm spacing, soldermask left on.
  • Ground pour only on the component side, with the sensing region kept clear.
  • Export Gerbers and LCSC-compatible BOM.
Tooling limitation observed
The available write tools in this project session can:
  • change stackup templates,
  • change global layout rules,
  • resize the board,
  • and place components.
The available write tools in this session do not expose direct creation/editing of custom copper trace geometry, polygons, or fills for the interdigitated sensing electrodes, and they do not expose an explicit autorouter action for resolving all existing airwires. Because of that, the sensing-region copper pattern and full routing completion may require direct manual PCB editing in the editor or an additional routing/geometry tool.
  • Current manufacturing-finalization status

  • Requested physical targets

  • Tooling limitation observed

Assets

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Soil Moisture Probe

Soil Moisture Probe thumbnail
150 mm x 15 mm 2-layer soil moisture probe using an external 3.3 V supply, FDC1004 capacitance sensor, DS18B20 temperature sensor, top-half component placement, and a bottom-half exposed interdigitated sensing electrode region on both copper layers with 1 mm trace/space for JLCPCB 0.8 mm fabrication.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$1.96

Digi-Key

$2.82–$5.31

LCSC

$3.08

Mouser

$3.19

Controls