Integrated CMU/BMU Schematic Notes
Updated: 2026-06-03
Architecture Scope
This schematic has been redesigned toward a single Integrated CMU/BMU Board for the UAM redundancy architecture. The board is intended to monitor 3 sub-modules totaling 96S and support Master/Slave BMU control tasks using one S32K344 MCU.
AFE Scaling
- Total ADBMS6830 AFE IC count is now 6: IC1 through IC6.
- Each ADBMS6830 block monitors one 16-cell segment.
- Total monitored cell span: 6 × 16 = 96 series cells.
- New AFE assignments:
- IC4: cells 49-64
- IC5: cells 65-80
- IC6: cells 81-96
Cell Voltage Filter Networks
Each new AFE block follows the existing ADBMS6830 filter convention and datasheet guidance:
- 17 × 200 Ω series cell tap filter resistors per AFE block.
- 16 × 10 nF differential filter capacitors per AFE block.
- 1 µF bypass capacitors on VREG, VREF1, and VREF2 per new AFE.
- New cell tap nets are named
AFE4_CELL_TAP_00..16, AFE5_CELL_TAP_00..16, and AFE6_CELL_TAP_00..16.
ADBMS6830 Communication Chain
The existing chain has been extended from 3 AFEs to 6 AFEs:
- Existing MCU-to-IC1 4-wire SPI interface retained.
- IC1 Port B → IC2 Port A.
- IC2 Port B → IC3 Port A.
- IC3 Port B → IC4 Port A.
- IC4 Port B → IC5 Port A.
- IC5 Port B → IC6 Port A.
- IC6 Port B is terminated with a 50 Ω differential termination resistor.
Notes:
- This preserves the existing S32K344-to-first-AFE control structure while extending the ADBMS daisy chain.
- IC4, IC5, and IC6 have ISOMD tied to VREG for isoSPI mode.
Internal Redundant CAN
Added an automotive-grade CAN FD transceiver:
- U2: TI TCAN1043ADRQ1.
- MCU CAN nets:
MCU_CAN_TX: S32K344 PTB2 → U2 TXD.
MCU_CAN_RX: U2 RXD → S32K344 PTB3.
- CAN bus nets:
INTERNAL_CAN_H
INTERNAL_CAN_L
- Termination:
- R106 = 120 Ω between CANH and CANL.
- Logic rail:
- U2 VIO connected to
MCU_IO_VDD.
- CAN transceiver supply placeholders:
CAN_5V for U2 VCC.
CAN_VSUP for U2 VSUP.
Important follow-up: the current schematic does not yet show a complete CAN_5V/CAN_VSUP power source. These rails must be tied into the final BMU power architecture before layout/routing.
Relay Control Outputs
Two S32K344 digital output nets were exposed:
CONTACTOR_CTRL_DO: S32K344 PTB4.
PRECHARGE_RELAY_CTRL_DO: S32K344 PTB5.
These are logic-level control nets only. External high-side/low-side relay drivers, flyback protection, diagnostics, and safety interlocks still need to be added before this can directly drive contactor or pre-charge hardware.
Open Engineering Items
- Confirm S32K344 pin-mux assignments for PTB2/PTB3 as the selected CAN TX/RX pair.
- Add or confirm the board power tree for
CAN_5V, CAN_VSUP, MCU_IO_VDD, and AFE support rails.
- Add contactor/pre-charge driver stages with appropriate isolation/protection if these outputs leave the low-voltage logic domain.
- Decide whether the first AFE should remain direct SPI from the MCU or be converted to a fully isolated isoSPI front-end using an isoSPI master/transformer interface.
- Add external connectors/harness definitions for all 96 cell taps and internal CAN if not already handled elsewhere.