BCOTI Control Board Design

flux

Work completed
  • Updated project description with relevant hashtags (#2layer, #BCOTI, #compact, #USB, #ESP32C3, #diffpair)
  • Added system architecture mermaid diagram
  • Placed and configured components:
    • U1 ESP32-C3 SuperMini
    • C1 & C2 100 nF decoupling capacitors
    • J1 USB-C power connector
    • J2 USB Type-A data connector
    • J3 CV256 Mini2 5-pin connector
    • J4 LZE039 10-pin connector
    • J5 4-pin button header
    • SW1 PTR902-2015K-A104 potentiometer with switch
    • TP1, TP2, TP3, TP4, TP5 test points
  • Completed all net connections per plan
  • Updated design properties:
    • ERC Review Findings; set voltage rating status for C1 and C2
    • DRC Review Findings
    • Connector Clearances
    • Footprint extents (J1–J5, SW1)
    • Computed Max_Connector_Clearance
    • Computed and set Board_Width and Board_Height
    • Resized PCB layout to calculated outline
Work not done (requires manual or advanced layout steps)
  • Configuring full/near-full ground pour with stitching vias
  • Defining 2-layer stackup and DRC rules (6–8 mil trace/space; 10–20 mil for 5 V)
  • Placing edge connectors and optimizing component placement for cable flow and EMI
  • Routing USB D+/D– as matched-length differential pair
  • Routing 5 V and GND as short, wide traces with dedicated return paths
  • Adding silkscreen labels for components and nets
  • Running continuous DRC
Success criteria review
  • Reproduced all functional modules with exact net/pin mapping: ✅
  • USB D+/D– routed as matched-length differential pair: ❌
  • Compact board with connectors at practical edges: ❌
  • Robust 5 V/GND distribution with ground pour: ❌
  • Test/programming pads included: ✅
  • DRC completed with all rules met: ❌
Next recommended step Proceed with PCB layout configuration and routing:
  1. Define the 2-layer stackup and apply DRC rules.
  2. Add ground pour on bottom layer with stitching vias.
  3. Place edge connectors and ESP32-C3 module for optimal routing.
  4. Route USB differential pair, power, and ground nets.
  5. Add silkscreen labels and run continuous DRC.
Sign up to send
SW1
Capacitance
Capacitance
C2 P2 - GND GND
J4 NC - U1 GPIO4
J5 3 - U1 GPIO5
U1 GND - C1 P2
U1 5V - C2 P1
J3 1 - U1 GPIO3
J3 1 - U1 GPIO3
U1 3V3 - C1 P1
U1 5V - C2 P1
J5 3 - U1 GPIO5
C2 P2 - GND GND
J5 2 - U1 GPIO2
C2 P2 - GND GND
U1 3V3 - C1 P1
U1 5V - C2 P1
J3 2 - U1 GPIO1
J3 2 - U1 GPIO1
J5 2 - U1 GPIO2
J4 NC - U1 GPIO4
J3 3 - J4 MOSI
U1 5V - C2 P1
U1 GND - C1 P2
C2 P2 - GND GND
J5 1 - U1 GPIO0
J5 1 - U1 GPIO0
U1 5V - C2 P1
C2 P2 - GND GND
TP5
C1
Capacitance
100 nF
C2
Capacitance
100 nF
J5
TP4
J1
J3
U1
Capacitance
Capacitance
TP2
TP1
TP3
GND
Slight Scarlet Pip boy thumbnail
Ultra-Compact 2-Layer ESP32-C3 Control PCB for BCOTI V2_Beta with USB-C Power, USB-A Data, CV256 Mini2, LZE039, Button Header, and Pot-Based Brightness Control

Properties

mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
Diagram



  
    
  
  
    
  
















USB-C Power
USB-A Data
ESP32-C3
CV256 Mini2
LZE039
Button Array
Potentiometer/Switch
mm

Pricing & Availability

Distributor

Qty 1

Controls