Completed all 12 projects: 6 changed, 6 already correct, 0 failed; every saved description was verified by readback, with no ambiguity and zero publish calls.

Before: PNP bias-resistor-built-in (pre-biased) transistor, R1=10kΩ (base series), R2=47kΩ (base-emitter), VCEO -50V, VCBO -50V, VEBO -6V, IC -100mA, PC 200mW, Tj 150°C, hFE min 80. S-Mini (SC-59 / TO-236MOD, SOT-23-3)

After: PNP bias-resistor-built-in (pre-biased) transistor, R1=10kΩ (base series), R2=47kΩ (base-emitter), VCEO -50V, VCBO -50V, VEBO -6V, IC -100mA, PC 200mW, Tj 150°C, hFE min 80. S-Mini (SC-59 / TO-236MOD, SOT-23-3).

Before = After: PNP pre-biased bipolar transistor (BRT), R1 47kΩ from input to internal base and R2 22kΩ from internal base to emitter; VCBO/VCEO -50V, VEBO -15V, IC -100mA, PC 200mW, hFE min 70. RN2409,LF is General Use, not AEC-Q101-qualified; RN2409,LXHF is the separate automotive variant. S-Mini (SC-59 / Toshiba 2-3F1S).

Before = After: PNP pre-biased bipolar transistor (BRT). R1=47 kΩ connects pin 1 (B input) to the internal transistor base; R2=10 kΩ connects the internal base to pin 2 (E). Pin 3=C. VCEO=-50 V, IC=-100 mA, PC=200 mW. Toshiba S-Mini 2-3F1S, SOT-23-3. Native parametric symbol, footprint and CAD.

Before: N-channel MOSFET 30V 2A, RDS(on) 0.11Ω max @VGS=4.5V, VGSS ±8V, 0.4W, gate protect diode, SOT-23(TO-236)

After: N-channel MOSFET 30V 2A, RDS(on) 0.11Ω max @VGS=4.5V, VGSS ±8V, 0.4W, gate protect diode, SOT-23(TO-236).

Before: N-channel MOSFET 30V 0.8A, RDS(on) 0.29Ω max @VGS=10V (0.4Ω @4.5V), VGS ±20V, Pd 0.4W, built-in gate protection diode, SOT-23(TO-236) 3-pin

After: N-channel MOSFET 30V 0.8A, RDS(on) 0.29Ω max @VGS=10V (0.4Ω @4.5V), VGS ±20V, Pd 0.4W, built-in gate protection diode, SOT-23(TO-236) 3-pin.

Before = After: N-channel MOSFET 30V 0.3A, RDS(on) 2.0Ω max @VGS=10V, VGS ±20V, Pd 0.4W, built-in gate protection diode, SOT-23(TO-236). NRND per Torex.

Before = After: 20V 3.5A N-channel enhancement MOSFET, RDS(on) 75mΩ max @ VGS=4.5V, 125mΩ @ 2.5V, VGS(th) 0.5–1.2V, 1.25W, SOT-23 (SOT-23S), halogen-free. User-confirmed numbered pinout: 1=Gate (G), 2=Source (S), 3=Drain (D).

Before: UNVERIFIED PIN NUMBERING — not approved for use. P-channel enhancement-mode power MOSFET, -20V, -5A (Ta=25°C), RDS(on) 38mΩ max @ VGS=-4.5V, VGS ±8V, 1.38W, 1.8V gate drive, halogen-free, SOT-23 (marking A30)

After: UNVERIFIED PIN NUMBERING — not approved for use. P-channel enhancement-mode power MOSFET, -20V, -5A (Ta=25°C), RDS(on) 38mΩ max @ VGS=-4.5V, VGS ±8V, 1.38W, 1.8V gate drive, halogen-free, SOT-23 (marking A30).

Before: N-channel MOSFET, 30V, 4.5A, RDS(on) 35mΩ max @4.5V, VGS ±8V, 1.25W, SOT-23 (SOT-23S)

After: N-channel MOSFET, 30V, 4.5A, RDS(on) 35mΩ max @4.5V, VGS ±8V, 1.25W, SOT-23 (SOT-23S).

Before = After: 30V 4.3A N-channel enhancement MOSFET, RDS(on) 45mΩ max @ VGS=10V, 60mΩ @ 4.5V, VGS ±20V, 1.25W, SOT-23 (SOT-23S), marking A14SS. Pinout 1=G, 2=S, 3=D (user-confirmed).

Before: N-channel MOSFET, 30V, 5.4A, 28mΩ max @10V (42mΩ @4.5V), Vgs ±20V, 1.25W, SOT-23(S)-3, marking A17

After: N-channel MOSFET, 30V, 5.4A, 28mΩ max @10V (42mΩ @4.5V), Vgs ±20V, 1.25W, SOT-23(S)-3, marking A17.

Before = After: N-Channel 50 V (D-S) trench MOSFET, 5.9 A, RDS(on) 25 mΩ @ VGS=10 V / 30 mΩ @ 4.5 V, VGS ±20 V, 1.3 W, SOT-23.