FT8260-RT Footprint Verification


Verify FT8260-RT only
Owner jharwinbarrozo UID177bb043-1d5b-4193-bf18-3d534cc894ae versione2333a67-6344-453e-bf7c-45a56d091077. Datasheet https://datasheet.chipsmall.com/FT8260-RT/648381.pdf evidence dsq_997f5cda93c905fb17c3 ds1 blank package SOT23-6 RT RoHS reel ds2-7 pins; second dsq_92e05e0e741b9050b026 ds1 same order construction. Pins1COMP Passive compensation,2GND Ground,3CS Input,4GD Output,5VCC Power In,6ZCD Input. Geometry two queries dsq_b8c033b19b5e8902b069,dsq_92e05e0e741b9050b026 => default lands unqualified. Body outline width1.5-1.7 length2.82-3.02.
Check owner UID latest version URL,pins names/types/count/distinct mapping,actual pad geometry size axes/pitch/span/min gaps/no overlap,topview marker,parametric assetless model node/body/fit limits. Nominal not maximum envelope renderer omission not absence. No clones/sharing/instances/unrelated edits; read-only unless proven defect. Publish existing corrected new version only genuine repair. Compact pass/fail/unverified report.
PASS: Owner jharwinbarrozo, UID 177bb043-1d5b-4193-bf18-3d534cc894ae, and latest published version e2333a67-6344-453e-bf7c-45a56d091077 match; URL: /jharwinbarrozo/ft8260-rt. Six distinct terminal-to-pad mappings match: 1 COMP Passive, 2 GND Ground, 3 CS Input, 4 GD Output, 5 VCC Power In, 6 ZCD Input; actual rotated pads are 1.00 × 0.70 mm XY, pitch 0.95 mm, row-center span 2.60 mm, outer span 3.60 mm, opposing gap 1.60 mm, minimum adjacent gap 0.25 mm, with no overlap, and the transformed top-view marker correctly identifies COMP/pin 1.
UNVERIFIED: Manufacturer land-pattern qualification remains open as previously documented; the active assetless parametric SOT-23-6 model exists, centered with unit scale and nominal body 1.60 × 2.90 × 1.175 mm, but is not a maximum envelope—specified maximum body width/length exceed it by 0.10/0.12 mm total, and height/lead-envelope fit is not established. No proven defect, no edits, no republish, no clones or sharing changes.

Name
Pin #
Type
Section
Pin Group
Orientation
Order
Sub-symbol
Pin Description
COMP
1
Passive
Internal error-amplifier output compensation capacitor connection
GND
2
Ground
CS
3
Input
Primary current sense
GD
4
Output
External MOSFET gate drive
VCC
5
Power In
ZCD
6
Input
Zero-current and overvoltage detection

FT8260-RT

FT8260-RT thumbnail