I found a source mismatch: this part is labeled MDD, but its attached datasheet is for Infineon’s 2N7002. I’ll clearly distinguish the MDD-hosted specifications from conflicting supplier listings and avoid treating alternatives as unconditional drop-in replacements.
The 2N7002K is a small-signal N-channel enhancement-mode MOSFET in a three-terminal SOT-23 package; the MDD-hosted specification lists a 60 V drain–source limit. Its standard schematic use is a low-side switch for small loads or an open-drain signal driver, with the source grounded and the gate driven relative to the source.
Scope and source integrity: This Flux part is labeled MDD, but its attached datasheet is Infineon’s 2N7002, not an MDD 2N7002K. The guide therefore uses the specification hosted by MDD, SOT232N70S702K, revision A2, whose document is NextGen-branded and identifies the original part as MDD 2N7002K; this...
Created and verified the 2N7002K Application and Usage Guide in project files, with all seven requested sections, citations, practical wiring guidance, and two replacement candidates.
Important: the attached datasheet belongs to a different manufacturer, and MDD sourcing records conflict on ratings; the guide flags these uncertainties rather than assuming equivalence. Before production, confirm the purchased lot’s datasheet and qualify its thermal limits and replacement compatibility.
The 2N7002K is a small-signal N-channel enhancement-mode MOSFET in a three-terminal SOT-23 package; the MDD-hosted specification lists a 60 V drain–source limit. Its standard schematic use is a low-side switch for small loads or an open-drain signal driver, with the source grounded and the gate driven relative to the source.
Scope and source integrity: This Flux part is labeled MDD, but its attached datasheet is Infineon’s 2N7002, not an MDD 2N7002K. The guide therefore uses the specification hosted by MDD, SOT232N70S702K, revision A2, whose document is NextGen-branded and identifies the original part as MDD 2N7002K; this is a supplier specification, not proof of a current factory-controlled MDD revision. The manufacturer-hosted product page and current LCSC/JLCPCB listing also disagree on current and temperature ratings. Confirm the exact purchased lot’s controlled datasheet before production; do not transfer ratings between manufacturers merely because they share the 2N7002K name. No schematic, footprint, or part properties were changed.
1. Quick Specifications
Maximum ratings below are from the MDD-hosted A2 specification, MAX. RATINGS AT Ta = 25 °C, unless otherwise specified. They are stress limits, not recommended design targets; they must not be assumed simultaneously achievable.
Table
Parameter
Classification
Value and conditions
Drain–source voltage, VDS
Absolute maximum
60 V.
Gate–source voltage, VGS
Absolute maximum
±20 V.
Continuous drain current, ID
Absolute maximum in A2; sourcing conflict
0.5 A; current LCSC/JLCPCB C414015 lists 0.3 A instead. Confirm lot-specific rating.
Power dissipation, PD
Absolute maximum
0.3 W. The project description’s 0.5 W is not supported by this specification.
Junction temperature, TJ
Absolute maximum
+150 °C.
Storage temperature, TSTG
Stress/storage range, not ambient operating range
−50 to +150 °C in the A2 maximum-ratings table.
Junction-to-ambient thermal resistance, RθJA
Thermal reference
400 °C/W; actual PCB copper and airflow affect temperature rise.
RDS(on), VGS = 10 V
Electrical characteristic, Ta = 25 °C
0.9 Ω typical, 2 Ω maximum at ID = 0.5 A.
RDS(on), VGS = 4.5 V
Electrical characteristic, Ta = 25 °C
1.4 Ω typical, 3 Ω maximum at ID = 0.3 A.
Gate threshold, VGS(TH)
Characteristic; not full enhancement voltage
1.0 V minimum, 1.6 V typical, 2.5 V maximum at VDS = VGS and ID = 250 µA.
Package and pitch
Mechanical
SOT-23; dimension e = 1.9 mm typical. This is the same-side lead-center separation, not a uniform three-pin grid.
Recommended gate drive
Engineering recommendation, not a manufacturer operating-range table
Use a drive rail whose guaranteed minimum VGS reaches a characterized RDS(on) point, while remaining below the VGS limit. A nominal 5 V rail must be checked at its minimum voltage. Guaranteed RDS(on) at 3.3 V or 1.8 V is unverified.
Recommended ambient operating range
Unverified for the exact current MDD lot
Do not infer it from TSTG. A2 introductory temperature wording and present supplier listings differ; obtain a controlled current datasheet.
2. Pinout & Connections
Numbering follows the MDD-hosted package pin configuration; match pad numbers to the drawing rather than interpreting symbol position.
Table
Pin Number
Pin Name
Description
Best Practice
1
G — Gate
Voltage-controlled gate.
Drive relative to pin 2. For a default-off low-side switch, add a 10 kΩ gate-to-source resistor; a 100 Ω series gate resistor is an optional starting value, not a datasheet requirement.
2
S — Source
Source terminal.
Tie to GND for the standard low-side circuit and share GND with the controller. Keep the gate-driver reference close to this connection.
3
D — Drain
Drain terminal.
Connect to the load’s negative terminal or the open-drain output node. Connect the load’s other end to its positive supply; add a suitable clamp for inductive loads.
The intrinsic N-channel body diode conducts from source toward drain. Reversing source and drain can cause unwanted conduction with the gate off; a single MOSFET is not a bidirectional isolation switch. This is topology guidance, not a verified reverse-blocking feature of this part.
3. Standard Application Circuit
2N7002K low-side load switch
The following is a practical reference circuit, not a manufacturer-mandated passive network:
Text
+VLOAD ── LOAD ──┬── D (pin 3)
│ 2N7002K
│ S (pin 2) ── GND
GPIO ── 100 Ω ────── G (pin 1)
│
10 kΩ
│
GND
Required connections: source to GND, common controller/load-supply ground, and load between +VLOAD and drain. Apply a gate-high voltage sufficient for the desired conduction loss; a gate-low near source turns the device off.
Default-off bias: use 10 kΩ between gate and source when the controller can be high-impedance at reset. This guide-selected resistor prevents a floating gate; check leakage and noise against the required off margin.
Gate resistor: 100 Ω in series is a starting point for small, slowly switched loads. Adjust for controller peak-current limits, ringing, and switching loss; verify VGS and VDS on the assembled board. It is not mandatory for every application.
Inductive load: place a flyback diode across the load, cathode to +VLOAD and anode to drain. Select its repetitive reverse voltage, initial forward current, pulse energy, and thermal rating for the load. Do not assume the MOSFET is avalanche-rated. A faster-release clamp requires a separate voltage/energy analysis.
Supply capacitors: the MOSFET has no dedicated supply pin and requires no universal gate-decoupling capacitor. For a switched local supply, 100 nF ceramic plus load-dependent bulk capacitance is an engineering starting point; size the bulk capacitor from transient current and permitted rail droop. Place it near the load-current loop, not arbitrarily at the gate.
Open-drain output variant: replace the load with a pull-up to the receiving rail. A 10 kΩ pull-up is only a starting point: calculate low-state current, allowable VOL, and RC rise time from the receiving input and bus capacitance.
Loss and thermal checks before choosing load current
Use the engineering relations Pcond ≈ Irms² × RDS(on) and TJ ≈ TA + Ptotal × RθJA. Include temperature-dependent resistance, PWM switching loss, and any diode conduction; the estimates below use the A2 25 °C maximum resistance and are not full SOA qualification.
At 100 mA and the characterized 4.5 V drive point: Pcond ≈ 0.1² × 3 = 30 mW, VDS(on) ≈ 0.30 V, and estimated temperature rise ≈ 0.03 × 400 = 12 °C.
At 500 mA and the characterized 10 V point: Pcond ≈ 0.5² × 2 = 500 mW, exceeding the A2 300 mW maximum dissipation. Consequently, the headline 500 mA current is not a guaranteed usable continuous switching current under worst-case resistance.
For a design that requires guaranteed low loss from 3.3 V or 1.8 V GPIO, choose a MOSFET explicitly specifying maximum RDS(on) at or below the guaranteed GPIO-high voltage. Threshold alone does not establish this capability. LED resistor examples and USB CC termination are not intrinsic requirements of this MOSFET and are intentionally omitted.
4. PCB Layout & Routing Guidelines
These are integration recommendations, not manufacturer-prescribed universal trace widths.
Footprint: use the exact purchased manufacturer’s SOT-23 outline and recommended land pattern; verify 1 = G, 2 = S, 3 = D before fabrication. The MDD-hosted drawing lists a 1.9 mm typical e dimension. SOT-323 and other smaller three-terminal packages are not substitutes for this land pattern.
Thermal path: provide useful source/drain copper area. Avoid unnecessarily narrow thermal-relief spokes when dissipation matters, while preserving solderability; this SOT-23 has no separate exposed thermal pad. Do not assume the reference 400 °C/W applies to every layout.
Load-current routing: keep supply → load → drain → source → return compact. Size source/drain traces and vias from copper thickness, temperature rise, current, and permissible voltage drop; no single trace width is valid without a stackup and current target.
Gate routing: place the series resistor close to the gate, the pull-down close between gate and source, and keep the gate trace away from the switched drain. Avoid sharing a long, noisy source return with sensitive controller signals.
Clamp and capacitor placement: put the flyback diode close to the inductive load and keep the clamp loop short. Place local supply capacitors at the switched-load supply/return loop. Differential-pair routing is not a requirement of this discrete MOSFET.
5. Common Pitfalls / Things to Watch Out For
Treating gate threshold as a guaranteed logic-drive rating—or leaving the gate floating. The threshold measurement uses only 250 µA, while RDS(on) is characterized at 4.5 V and 10 V; there is no verified 3.3 V maximum RDS(on) in the cited MDD-hosted table. Add default-off bias and evaluate the worst-case controller-high voltage rather than typical transfer curves.
Designing directly to headline current or mixing same-name datasheets. MDD-hosted A2 allows 0.3 W and lists 0.5 A, but current LCSC/JLCPCB listings identify 0.3 A; other manufacturers have different thermal and resistance ratings. Calculate worst-case losses, derate for ambient temperature, clamp inductive transients, and qualify the exact manufacturer/order code.
6. Popular Alternatives & Equivalents
Both candidates below have verified pin compatibility with 1 = G, 2 = S, 3 = D and a standard SOT-23 package. They are nominal footprint-compatible candidates, not unconditional electrical drop-in equivalents; overlay their package/land-pattern drawings against the actual PCB before approval. Neither should inherit MDD’s headline 500 mA rating.
Same G/S/D numbering and SOT-23 Case 318. RDS(on) maximum is 1.6 Ω at 10 V/500 mA and 2.5 Ω at 4.5 V/200 mA. Steady current at 25 °C is 380 mA with a 1 in² pad or 320 mA with minimum pad. Found in the Flux library; recheck thermal, transient, leakage, and switching requirements.
Same G/S/D top-view numbering. Maximum RDS(on) is 2 Ω at 10 V and 3 Ω at 5 V, not a verified 4.5 V guarantee. Steady current at 25 °C is 380 mA at 10 V gate drive or 310 mA at 5 V under its specified PCB conditions. Exact-MPN Flux lookup returned no match; the link is the manufacturer datasheet, not a claimed library entry.
Supply-shortage acceptance criteria: check guaranteed gate-drive point, hot RDS(on), current/thermal conditions, off leakage, gate charge, clamp/avalanche requirements, package tolerances, and lifecycle before adding any substitute to an approved BOM.
7. Sourcing & Purchasing Guide
Table
Attribute
Details
Primary Distributors
For the exact MDD-branded part, LCSC C414015 provides a purchasing listing, and JLCPCB C414015 provides an assembly listing. The MDD-hosted product page also offers ordering/contact information. Authorized/franchised status for the MDD listing was not independently verified. DigiKey/Mouser/Arrow should be checked for the exact onsemi or Diodes ordering code, not assumed to stock this MDD device.
Packaging Options
MDD-hosted A2 specifies tape-and-reel, 3,000 pcs/reel; the product page likewise specifies 3,000-piece pack multiples. Cut-tape availability for the exact MDD lot is unverified. Diodes alternatives use -7 for 3,000-piece T&R and -13 for 10,000-piece T&R. These suffixes must not be applied to an MDD ordering code.
Standard MOQ
MDD-hosted direct ordering specifies 3,000-piece multiples. A one-unit cut-tape MOQ is not verified for MDD; check the live distributor cart, pack multiple, and assembly rules. Reel quantity and distributor MOQ are different attributes.
Sourcing Advice
Request a current controlled datasheet tied to the exact manufacturer, full order code, and lot/date code. Current C414015 listings describe 300 mA/300 mW, unlike the older 500 mA description. Buy from a manufacturer-confirmed authorized channel with traceability; avoid unverifiable marketplace stock. Confirm package, marking, packaging, lifecycle, and any automotive qualification separately. Do not substitute a Q/automotive suffix without its own datasheet and qualification evidence.
Unresolved before production: the exact current MDD die/revision associated with this library part and C414015; conflicting continuous-current and temperature claims; lot-specific thermal test conditions/SOA; guaranteed 3.3 V RDS(on); exact current cut-tape MOQ and channel authorization. No stock count, price, or lead time is promised here.
Sources
Research accessed 7 October 2026. Inline citations above refer to the exact extracted source evidence; links below provide the original documents and purchasing pages.
MDD-hosted SOT232N70S702K specification PDF: specification sheet P0908-SOT232N70S702K, A2, 8 September 2022. NextGen-branded supplier document hosted by MDD; primary source for this guide’s provisional MDD-specific table, with provenance limitations disclosed above.
MDD-hosted 2N7002K product page: undated; ordering and packaging source. Inconsistent narrative figures and unrelated pulse-power wording are not treated as valid MOSFET ratings.