USB Sensor Node

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Board is now set to a 100 × 80 mm, 4-layer stackup with internal GND and power planes. I’m placing the functional blocks next, keeping switching power away from the low-level DDS/analog path.

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Placement is complete: USB/power is grouped on the left/lower-left, DDS and low-level analog are central, and the output amplifier sits behind the right-edge BNC. I’m checking and tightening any remaining decoupling-placement issues now.
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PCB Layout Review — Programmable Function Generator

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Board outline set to 100 mm × 80 mm with 2 mm rounded corners. Stackup set to 4 copper layers for USB, SPI, analog output, and multi-rail po...

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PCB layout placement is complete on a 100 × 80 mm, 4-layer board: USB/power is on the left, LT3471 power is lower-left, DDS/control/conditioning are central, and the THS3091/BNC output is on the right. I ran placement, DRC, and BOM checks; details are captured in PCB Layout Review.
Open items:
  • Board is not routed yet, so airwires are expected.
  • DRC still reports exposed-pad footprint copper overlap on U3, U6, and U10.
  • Generic resistors/capacitors/inductors still need final orderable MPNs for assembly.
Suggested next steps:
  1. Repair or replace U3/U6/U10 exposed-pad footprints.
  2. Assign real MPNs/packages to generic passives and inductors.
  3. Route the PCB, then re-run full DRC.
Fix footprints and BOM
Fix footprint overlaps
Assign passive MPNs
Route the PCB
Run full checks
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PCB Layout Review — Programmable Function Generator
Layout Work Completed
  • Board outline set to 100 mm × 80 mm with 2 mm rounded corners.
  • Stackup set to 4 copper layers for USB, SPI, analog output, and multi-rail power routing.
  • All 90 physical components placed on the top side.
  • Functional placement zones:
    • Left edge: USB-C input J1, USB ESD and CC resistors, input protection U1.
    • Upper-left: STM32 U4, SWD header J3, USB routing passives.
    • Lower-left: LT3471 ±15 V switching supply, inductors, Schottky diodes, output capacitors, and feedback/soft-start passives.
    • Center: AD9833 DDS U5, 25 MHz oscillator X1, reconstruction/filtering and waveform mux U6.
    • Center-right: ADA4898 conditioner U10, DAC/digipot control U9/U7.
    • Right edge: THS3091 output amplifier U8 and BNC output J2.
Placement Status
  • No component body overlap or outside-board placement errors remain.
  • Routing congestion improved after spreading the central control/analog section; current layout summary reports routing space is acceptable on the 4-layer stackup.
  • All components remain top-side for simpler assembly.
DRC / Layout Checks

Table

Check AreaResultNotes
Board size / placementPassComponents fit on 100 × 80 mm board
StackupPass4-layer stackup confirmed after final board update
Component overlap / outside boardPassNo reported component placement errors in final checked set
AirwiresExpected openBoard is placed but not routed; airwires remain until routing phase
Overlapping copperOpen issue12 errors on U3, U6, and U10 exposed-pad/thermal-mount footprint geometry
Missing footprintsPassNo missing-footprint errors reported
BOM availabilityMixedMain ICs/connectors have MPNs; generic passives/inductors still need final orderable MPNs
Open DRC Issue: Exposed-Pad Footprint Copper
The overlapping-copper checks are concentrated on:
  • U3 LT3471EDD#PBF exposed GND pad area
  • U6 ADG758CPZ exposed/substrate VSS pad area
  • U10 ADA4898-2YRDZ exposed pad area
The checks appear to be caused by unnamed duplicate footprint thermal/mount pads overlapping the named exposed pad terminals. Attempting to delete the duplicate internal mount pads by UID did not succeed because those nodes are not exposed as normal editable layout nodes. This should be resolved before manufacturing by replacing/repairing those footprints or using a library footprint variant with a single correctly-netted exposed pad.
BOM Check Notes
  • 17 non-generic part groups have MPNs populated.
  • Generic passives/inductors are still generic and trigger manufacturer-part-number checks:
    • 33 resistors
    • 37 capacitors
    • 3 inductors
  • Before assembly export, select real MPNs/packages for the generic passives, especially:
    • LT3471 inductors L1/L2/L3 with adequate saturation current
    • ±15 V rail capacitors C23/C24/C25 and output amp decoupling C34-C37
    • precision feedback/gain resistors R20-R27/R30-R33
  1. Resolve U3/U6/U10 exposed-pad footprint overlap issue.
  2. Assign package and MPNs to generic passives and power inductors.
  3. Route the board, starting with power rails and high-speed/analog-sensitive nets.
  4. Re-run full DRC including airwires after routing.

  • Layout Work Completed

  • Placement Status

  • DRC / Layout Checks

  • Open DRC Issue: Exposed-Pad Footprint Copper

  • BOM Check Notes

  • Recommended Next Steps