USB Sensor Node
Worked for 7 mins 40 sec
Placement is complete: USB/power is grouped on the left/lower-left, DDS and low-level analog are central, and the output amplifier sits behind the right-edge BNC. I’m checking and tightening any remaining decoupling-placement issues now.
Worked for 15 mins 19 sec
Created a project doc
PCB Layout Review — Programmable Function Generator
Board outline set to 100 mm × 80 mm with 2 mm rounded corners. Stackup set to 4 copper layers for USB, SPI, analog output, and multi-rail po...
View docPCB layout placement is complete on a 100 × 80 mm, 4-layer board: USB/power is on the left, LT3471 power is lower-left, DDS/control/conditioning are central, and the THS3091/BNC output is on the right. I ran placement, DRC, and BOM checks; details are captured in PCB Layout Review.
Open items:
- Board is not routed yet, so airwires are expected.
- DRC still reports exposed-pad footprint copper overlap on U3, U6, and U10.
- Generic resistors/capacitors/inductors still need final orderable MPNs for assembly.
Suggested next steps:
- Repair or replace U3/U6/U10 exposed-pad footprints.
- Assign real MPNs/packages to generic passives and inductors.
- Route the PCB, then re-run full DRC.
Fix footprints and BOM
Fix footprint overlaps
Assign passive MPNs
Route the PCB
Run full checks
Refine this doc
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Project Specification — Programmable Function Generator
Project Overview
- Status: Draft schematic architecture
- Device: Programmable function generator PCB.
- Primary requirement: Generate sine, triangle, and square waveforms from 1 Hz to 1 MHz.
- Output amplitude target: Adjustable from near 0 V to ±10 V peak (20 Vpp), centered at 0 V.
Intended Use
- Bench/prototype signal source for general electronics work.
- Current design assumes high-impedance output loading. It is not yet specified or guaranteed for 20 Vpp into 50 Ω.
What the Device Should Do
- Set frequency from 1 Hz to 1 MHz.
- Select sine, triangle, or square output.
- Adjust square-wave duty cycle under firmware control.
- Adjust output amplitude up to ±10 V.
- Provide USB-C power and USB device control/programming.
Main Features
- USB-C 5 V input and USB 2.0 data connection.
- STM32 MCU control plane.
- AD9833 DDS waveform core for sine/triangle generation.
- Digitally generated square wave for adjustable duty cycle.
- Low-level waveform mux before high-voltage gain stage.
- Programmable-gain high-voltage output amplifier.
- ±15 V analog rails generated from protected USB 5 V.
- BNC signal output with output protection/protection resistor.
- SWD debug/programming header.
System Architecture
Diagram
Hardware Subsystems
Power
- USB-C receptacle configured as a 5 V sink with independent 5.1 kΩ CC pull-downs.
- MP5016 eFuse/current-limit switch protects the 5 V rail.
- 3.3 V LDO powers MCU, DDS, DAC/control, mux, and oscillator.
- LT3471 generates ±15 V analog rails for the high-voltage output amplifier.
Waveform Generation
- AD9833 DDS provides sine and triangle output from a 25 MHz oscillator.
- STM32 timer output provides square wave with firmware-adjustable duty cycle.
- Firmware sets frequency registers and timer parameters.
Analog Output
- Low-level signals are selected before high-voltage gain.
- THS3091 current-feedback amplifier provides the final ±10 V-capable output stage on ±15 V rails.
- AD5290 high-voltage digital potentiometer provides programmable gain control.
USB / Programming
- USB-C D+/D− route to STM32 USB FS pins.
- 10-pin Cortex SWD header provides debug/programming access.
Interfaces and Connections
Table
| Interface | Purpose | Notes |
|---|---|---|
| USB-C | 5 V input and USB control | Default USB-C sink, USB 2.0 data only |
| BNC | Analog waveform output | Amplitude calibrated for high-Z load assumption |
| SWD 10-pin | STM32 debug/programming | SWDIO, SWCLK, NRST, 3V3, GND |
| SPI bus | Control DDS, DAC, and digital potentiometer | Shared SCLK/MOSI with separate chip-selects |
Power and Runtime Expectations
- Input: USB-C 5 V.
- Target source current: below 1 A typical for high-Z output operation.
- Output load assumption: high impedance, recommended ≥1 kΩ for the current schematic target.
Power Tree and Power Budget
Table
| Rail | Source | Estimated Typical | Estimated Peak | Loads |
|---|---|---|---|---|
| 5V_PROT | USB-C via eFuse | 150–300 mA | <1 A target | 3.3 V LDO, LT3471 |
| 3V3 | LDO from 5V_PROT | ~70 mA | ~150 mA | MCU, AD9833, DAC, mux, oscillator, logic |
| +15V_A | LT3471 | ~20–80 mA | load-dependent | output amplifier |
| -15V_A | LT3471 | ~20–80 mA | load-dependent | output amplifier |
Manufacturing and Assembly Expectations
- SMD-first PCB, with through-hole BNC and optional SWD header.
- High-speed analog layout is critical: short feedback paths, solid ground, local decoupling, and output-stage thermal pad copper.
- The current design should be reviewed before manufacturing if 50 Ω drive, calibrated amplitude flatness, or low-distortion sine performance is required.
Firmware-Relevant Hardware Requirements
- USB CDC or custom USB control protocol.
- SPI control for DDS frequency/waveform and amplitude-control devices.
- Timer output for adjustable-duty square wave.
- Calibration table for amplitude vs frequency and output zero trim.
Physical Design Expectations
- BNC at board edge.
- USB-C at board edge.
- Separate noisy switching regulator area from DDS/output analog path.
- Keep AD9833 clock/output and THS3091 feedback loop short and shielded by ground.
Important Design Decisions
- Use AD9833 for a compact, practical DDS source; note that waveform purity near 1 MHz is utility-grade, not lab-grade AWG performance.
- Use MCU-generated square wave for duty control rather than analog triangle thresholding for better duty stability.
- Use ±15 V analog rails because ±12 V leaves too little swing margin for ±10 V output.
- Specify high-Z output first; 50 Ω/20 Vpp operation requires a more power-capable output stage and power budget.
Assumptions
- Output amplitude means ±10 V peak / 20 Vpp centered at 0 V.
- Output load is high impedance unless revised.
- No user interface display/knob is included yet; board is controlled over USB/firmware.
- USB-C is used for power and programming/control.
Change Notes
- Initial architecture selected and project renamed from placeholder.
Project Overview
Intended Use
What the Device Should Do
Main Features
System Architecture
Hardware Subsystems
Power
Waveform Generation
Analog Output
USB / Programming
Interfaces and Connections
Power and Runtime Expectations
Power Tree and Power Budget
Manufacturing and Assembly Expectations
Firmware-Relevant Hardware Requirements
Physical Design Expectations
Important Design Decisions
Assumptions
Change Notes
