Added test points for MOSI, MISO, SCK, CS, DC, RST, BUSY
Renamed nets to PANEL_MOSI, PANEL_MISO, PANEL_SCLK, PANEL_CS, PANEL_DC, PANEL_BUSY
Documented FPC connector orientation and added layout keepout note: "Maintain 5 mm clearance for high-voltage nets (VGH, VGL, VCOM)"
Success criteria
✅ Waveshare connector replaced with raw FPC connector
✅ High-voltage rails implemented via PMIC
✅ SPI (with series damping) and control signals correctly rewired
✅ ERC passes and BOM placeholders integrated
Next step
Prepare PCB layout: review footprints, set up stackup, place components, and run Auto-Layout for routing.