Infrared Sensor Battery Design
Worked for 37 sec
The core schematic is functional, but I’m adding the missing production-grade completion items: USB VBUS protection and convenient rail test points.
Worked for 7 mins 33 sec
The schematic is now complete for the requested battery-powered USB‑C PIR/infrared sensor board. I added USB input protection with F2 PTC fuse and D2 TVS diode, plus test points for VBUS, VBAT, 3V3, and GND, and the schematic ERC checks now report no open errors/warnings.
Estimated time saved vs. manual EDA workflow: ~1–2 hours.
Open items:
- PCB layout/routing is still not done.
- Use a protected LiPo cell, or ask me to add a dedicated LiPo protection/power-path charger.
- Final production BOM still needs exact MPNs for generic resistors/capacitors/test points/header if you want manufacturing export.
Updated project files:
Suggested next steps:
- Confirm the exact PIR sensor/module.
- Add LiPo protection/power-path if you want safer always-on charging.
- Move to PCB placement and routing.
Layout and BOM
Start PCB layout
Add power path
Finalize BOM
Run full review
Refine this doc
Ask about this doc
Power and Design Notes — USB-C LiPo PIR Sensor
Architecture
- USB-C receptacle J1 provides 5 V as a power-only sink on
VBUS_RAW. - R10/R11 are independent 5.1 kΩ CC pull-downs for USB-C sink attach.
- F2 is a 500 mA hold resettable PTC fuse between
VBUS_RAWand protectedVBUS. - D2 is a 5 V TVS/ESD clamp from protected
VBUStoGND. - U1 MCP73831 charges one LiPo cell on net
VBAT. - J2 is the 2-pin JST-PH LiPo connector.
- U2 MCP1703A generates
3V3fromVBAT. - U3 Motion Detector Module is powered from
3V3and exposes digitalPIR_OUTthrough J3. - TP1–TP4 provide probe access to
VBUS,VBAT,3V3, andGND.
Power Budget
Table
| Rail | Load | Estimated Current | Notes |
|---|---|---|---|
| 3V3 | PIR motion module U3 | <50 mA assumed | Actual module datasheet unavailable in library; design uses 250 mA-capable LDO margin. |
| 3V3 | Output header J3 | User load dependent | Keep external load small unless regulator/battery sizing is revisited. |
| VBUS_RAW/VBUS | MCP73831 charger | ~500 mA max | Set by 2 kΩ PROG resistor and protected by 500 mA hold PTC. |
| VBAT | LDO input + charger output | <250 mA logic load, 500 mA charge path | Battery charge current is independent of 3V3 load. |
Component Value Rationale
- USB-C CC pins: 5.1 kΩ pull-downs to GND for sink mode.
- USB input protection: 500 mA hold PTC in series with VBUS and 5 V TVS from protected VBUS to GND.
- MCP73831
VCC: 4.7 µF input bypass per datasheet. - MCP73831
BAT: 4.7 µF battery/output capacitor per datasheet for loop stability. - MCP73831
PROG: 2 kΩ to GND gives approximately 500 mA fast charge current using IREG = 1000 / RPROG(kΩ). - MCP1703A input/output capacitors: 1 µF ceramic each per datasheet.
- PIR output pull-down: 100 kΩ weak bias for defined output if the module output is high impedance.
Known Assumptions / Follow-ups
- The PIR module library part has no accessible datasheet; pin names suggest
3V3,VCC,GND,PIR_OUT, and unusedPIR. Verify module pinout before manufacturing. - No USB data path is implemented; D+/D− and SBU pins are intentionally no-connect.
- No standalone LiPo cell protection IC is included. Use a protected LiPo cell or add protection/power-path circuitry in a later revision.
- This is a charge-while-load-connected topology, not a true power-path charger. For always-on operation with clean charge termination, replace U1 with a charger/power-path IC in a later revision.
Architecture
Power Budget
Component Value Rationale
Known Assumptions / Follow-ups
