EasyEDA Migration Notes
Source: PCB_PCB_Analog-Noise-Cancellation_2026-05-03.json
Extracted source summary
- Source type: EasyEDA PCB JSON (
docType: 3), PCB/layout export rather than a full schematic document.
- Original board outline: rectangular, approximately 200.6 mm × 150.0 mm.
- Extracted components: 28 total.
- Extracted nets: 17 total.
- Extracted routing: 116 routed copper track segments plus 13 vias.
Components migrated
- U1, U2: LM358DRG3 dual op-amps, SOIC-8.
- Resistors: R1 33k, R2 33k, R3 15k, RF 10k, RF3 10k, R_BIAS 5k, R_IN 10k, R_OUT 100, R_Q1 100k, R_Q2 10k, R_S1 10k, R_S2 10k, R_VG1 10k, R_VG2 10k.
- Capacitors: C1 0.1uF, C2 0.1uF, C3A 0.1uF, C3B 0.1uF, C_BYPASS1 0.1uF, C_BYPASS2 0.1uF, C_IN 10uF, C_OUT 10uF, C_VG 100uF.
- Connectors: INPUT, OUTPUT, CN1 as 2-pin 5.00mm terminal blocks.
Cleanup decision
The EasyEDA PCB data showed U1 pin 8 on a separate U1_8 net connected only to C_BYPASS1. For a functional LM358 design, this was corrected during schematic migration by tying U1 VCC and C_BYPASS1 to the 12V rail. The power connector requested as VCC was reassigned by Flux to CN1 because VCC was unavailable as a component designator.
Manufacturing defaults selected
- Stackup: Standard 2 Layer, suitable for this low-speed analog op-amp board.
- Initial board size: 200.6 mm × 150.0 mm to preserve the imported EasyEDA board outline.
- Routing rules: 0.254 mm signal trace width and 0.152 mm minimum clearance based on the uploaded EasyEDA router settings.
Current validation status
- Schematic migration: complete, with 28 components and 16 active nets in Flux.
- Layout setup: complete, with a 200.6 mm × 150.0 mm rectangular board and Standard 2 Layer stackup.
- Placement: complete, with connectors at board edges and op-amp/filter blocks arranged left-to-right.
- ERC checks requested: floating pin, single-pin net, and undriven-net checks passed.
- DRC checks requested: overlapping copper and missing-footprint checks passed.
- Remaining blocker: airwire review reports 44 unrouted connections. The current automation environment does not expose an individual routing or autoroute action, so final trace routing and clean airwire signoff still require manual routing in the Flux PCB editor before Gerber outputs should be considered production-ready.
Generated outputs
- BOM exports were generated.
- Pick-and-place exports were generated.
- Gerber export was intentionally not generated because unresolved airwires remain.