Quad BLDC Drone ESC Design
PM_6S_PROTECTEDGND3V3_A and GND, with one spare pin marked no-connectDiagram
Table
| Rail | Source | Loads | Current Status |
|---|---|---|---|
| 6S BAT | External 6S LiPo pack | Power-management board / flight-controller power input | Pack connector, fuse, reverse-polarity protection, TVS, current/voltage monitor TBD |
| Protected VBAT outputs | Power-management board | ESC board, flight controller, E/O camera | Each downstream board needs its own surge/current protection path |
| VBAT / VMOTOR | Protected 6S output | Four inverter stages, 4 × DRV8308 VM | 20 A continuous per motor / 80 A board continuous; 36 A max per motor / 144 A board max; 52 A spike per motor / 208 A board simultaneous spike case |
| 3.3 V | Buck regulator from battery | 2 × STM32G474, logic, comms | TBD after component selection |
| 5 V Hall | DRV8308 VREG5 per channel or external 5 V | Hall sensors | Hall current TBD |
Table
| Pin | Signal | Direction | Purpose |
|---|---|---|---|
| 1 | GND | — | Return / shield |
| 2 | GND | — | Return / shield |
| 3 | FC_SPI_SCK | FC → ESC | Shared SPI clock |
| 4 | GND | — | Return adjacent to SCK |
| 5 | FC_SPI_MOSI | FC → ESC | Shared SPI controller-to-ESC data |
| 6 | GND | — | Return adjacent to MOSI |
| 7 | FC_SPI_MISO | ESC → FC | Shared SPI ESC-to-controller data |
| 8 | GND | — | Return adjacent to MISO |
| 9 | ESC_U1_CS_N | FC → ESC | Chip-select for STM32 U1 / motors 1–2 |
| 10 | ESC_U2_CS_N | FC → ESC | Chip-select for STM32 U2 / motors 3–4 |
| 11 | ESC_U1_INT_N | ESC → FC | U1 interrupt/data-ready |
| 12 | ESC_U2_INT_N | ESC → FC | U2 interrupt/data-ready |
| 13 | ESC_U1_FAULT_N | ESC → FC | U1 aggregated motor/driver fault |
| 14 | ESC_U2_FAULT_N | ESC → FC | U2 aggregated motor/driver fault |
| 15 | ESC_U1_RESET_N | FC → ESC | Reset U1 from flight controller |
| 16 | ESC_U2_RESET_N | FC → ESC | Reset U2 from flight controller |
| 17 | ESC_U1_READY | ESC → FC | U1 firmware ready/healthy |
| 18 | ESC_U2_READY | ESC → FC | U2 firmware ready/healthy |
| 19 | FC_HEARTBEAT | FC → ESC | Flight-controller heartbeat / failsafe monitor |
| 20 | ESC_SYNC | FC → ESC | Optional command-frame sync / timebase strobe |
| 21 | 3V3_IO_REF | FC ↔ ESC | Logic-level reference only; current-limited, not primary power |
| 22 | GND | — | Return for reference/control signals |
| 23 | ESC_ARM_ENABLE | FC → ESC | Hardware arming gate / safety enable |
| 24 | ESC_SAFE_STATE_N | FC → ESC | Optional forced-safe / inhibit line |
| 25 | FC_UART_TX_SPARE | FC → ESC | Spare debug UART TX or GPIO |
| 26 | FC_UART_RX_SPARE | ESC → FC | Spare debug UART RX or GPIO |
| 27 | I2C_SCL_SPARE | Bidirectional | Spare low-speed expansion |
| 28 | I2C_SDA_SPARE | Bidirectional | Spare low-speed expansion |
| 29 | AUX_TX_SPARE | FC → ESC | Spare GPIO/UART/CAN-reserved signal |
| 30 | AUX_RX_SPARE | ESC → FC | Spare GPIO/UART/CAN-reserved signal |
| 31 | GND | — | Additional return / shield |
| 32 | GND | — | Additional return / shield |
| 33 | SPARE_GPIO1 | TBD | Spare |
| 34 | SPARE_GPIO2 | TBD | Spare |
| 35 | SPARE_GPIO3 | TBD | Spare |
| 36 | SPARE_GPIO4 | TBD | Spare |
| 37 | GND | — | Additional return / shield |
| 38 | GND | — | Additional return / shield |
| 39 | SPARE_GPIO5 | TBD | Spare |
| 40 | SPARE_GPIO6 | TBD | Spare |
| 41 | SPARE_GPIO7 | TBD | Spare |
| 42 | SPARE_GPIO8 | TBD | Spare |
| 43 | GND | — | Additional return / shield |
| 44 | GND | — | Additional return / shield |
| 45 | SPARE_GPIO9 | TBD | Spare |
| 46 | SPARE_GPIO10 | TBD | Spare |
| 47 | SPARE_GPIO11 | TBD | Spare |
| 48 | SPARE_GPIO12 | TBD | Spare |
| 49 | GND | — | Additional return / shield |
| 50 | GND | — | Additional return / shield |
| 51 | RESERVED_1 | TBD | Reserved for future telemetry/control |
| 52 | RESERVED_2 | TBD | Reserved for future telemetry/control |
| 53 | RESERVED_3 | TBD | Reserved for future telemetry/control |
| 54 | RESERVED_4 | TBD | Reserved for future telemetry/control |
| 55 | GND | — | Additional return / shield |
| 56 | GND | — | Additional return / shield |
| 57 | MECH_ID0 | Passive/TBD | Optional board ID / strap |
| 58 | MECH_ID1 | Passive/TBD | Optional board ID / strap |
| 59 | GND | — | End return / shield |
| 60 | GND | — | End return / shield |
Project Overview
Intended Use
What the Device Should Do
Main Features
System Architecture
Hardware Subsystems
Power Input and Protection
Microcontrollers
Motor
Interfaces and Connections
Power and Runtime Expectations
Power Tree and Power Budget
Power-Management / Flight-Controller Integration Direction
Manufacturing and Assembly Expectations
Firmware-Relevant Hardware Requirements
Physical Design Expectations
ESC ↔ Flight-Controller SPI Mezzanine Pinout
Important Design Decisions
Assumptions
Open Questions Blocking Final Power-Stage Sizing
Change Notes