Hardware Prototype Timeline


what woudl you recommend?
I recommend rerouting the two blocking traces.
Delete and rebuild the local TC_SPI_CS_N and TC_MINUS_FILT segments, connect U3’s AGND/DGND directly to C7/C8, then reroute the displaced signals. This is the least invasive option, preserves the other completed routing, and gives the MAX31856 short local decoupling returns without moving components.
ok let's do that
I’ll surgically remove the two blocking signal segments, close U3’s AGND/DGND returns to C7/C8, rebuild the displaced signals, then clean copper and run final DRC plus an independent review.
The two U3 ground returns are now connected, and TC_MINUS_FILT has been rebuilt cleanly. The final TC_SPI_CS_N route timed out after its stale branches were removed, so I’m using the permitted cleanup routing pass on that single remaining airwire.
The surgical reroute succeeded for TC_SPI_CS_N, TC_MINUS_FILT, and U3 AGND. One airwire remains because the rebuilt chip-select trace blocks C8’s DGND escape.
I recommend moving and rotating C8 below U3; this creates a short, clean decoupling return without disturbing the rest of the board.
1. Move C8 below U3
2. Leave one airwire

Single-Tube RT-LAMP Reader

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