ESP32-C3 Mini Drone FC Design
Worked for 9 mins 2 sec
I continued the production-layout cleanup and made progress before credits ran out.
Completed:
- Rechecked the live schematic/layout state.
- Confirmed the board is still 40 mm × 40 mm, 4-layer, with 27 nets.
- Reorganized placement toward the requested industry-grade structure:
- M2 mounting holes moved to the four FC-pattern corners.
- ESP32 RF module moved to the top edge for antenna exposure.
- USB-C moved to a board edge.
- Switches/debug connectors/test points grouped toward one side.
- BMI270 kept near the board center.
- C9 moved near (-5, -4.5) and C3 near (-2, -4.5), separated from each other while staying close to the IMU.
- R2/R9 separated near the ESP32 strap area.
- Power section kept as a compact lower-board cluster.
- Corrected USB-C placement after it protruded too far past the edge by moving J5 inward to about (12.0, -2.8).
Current state:
- Placement has improved, but final validation did not complete.
- Routing has not started.
- Review/preflight still needs to be rerun after the last USB-C adjustment.
- Any remaining out-of-board, overlap, or airwire issues still need to be checked and fixed before routing.
Recommended next steps:
- Re-run layout review/preflight.
- Fix any remaining placement issues.
- Route in this order: power/GND, USB D+/D−, buck-boost switch loop, I2C/IMU, motor PWM, UART/test points.
- Run full review and fix all remaining DRC/ERC issues before manufacturing export.
Run layout review
Check capacitor clearance
Verify orientations
Suggest SIM placement
Run DRC/ERC
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Project Specification — ESP32-C3 Mini Drone Flight Controller
Project Overview
- Status: Draft / implementation in progress
- Device: 40 mm × 40 mm mini drone flight-controller PCB.
- Core ICs: ESP32-C3-MINI-1U-N4 MCU/radio module, BMI270 IMU, TPS63001DRCR buck-boost regulator.
- Production update: Added USB-C 2.0 support for ESP32-C3 native USB Serial/JTAG plus protected USB bench-power input.
- Purpose: Provide stabilized 3.3 V power, inertial sensing, motor PWM outputs, GPS expansion, USB-C programming/debug access, and production-ready protection for a compact quadcopter controller.
Intended Use
- Prototype/validation flight-controller board for a small quadcopter.
- Powered primarily from a 1S LiPo battery.
- USB-C can power the low-voltage electronics for programming/bench testing, but it is not a LiPo charger.
- Intended for reflow assembly with all components on the top side.
What the Device Should Do
- Regulate diode-ORed VSYS input to a 3.3 V system rail.
- Run ESP32-C3 firmware for flight control, telemetry, and peripheral management.
- Read BMI270 accelerometer/gyroscope data over I2C.
- Output four motor-control PWM signals.
- Support GPS over UART0 and native USB-C programming/debug over ESP32-C3 USB Serial/JTAG.
- Provide bring-up test points for power, I2C, reset/enable, motor output, and battery-sense signals.
Main Features
- ESP32-C3 WiFi/BLE module with antenna keepout at board edge.
- USB-C 2.0 receptacle with CC1/CC2 5.1 kΩ sink pull-downs, USB D+/D- ESD array, 500 mA resettable VBUS fuse, and Schottky diode isolation.
- BMI270 6-axis IMU centered on board and aligned to drone axes.
- TPS63001 3.3 V buck-boost regulator for LiPo operation across discharge range.
- JST connectors for LiPo, motors, GPS/debug UART, and programming/debug access.
- Reset and boot buttons.
- Status LED.
- 4× M2 mounting holes on 30.5 mm × 30.5 mm flight-controller pattern.
System Architecture
Diagram
Hardware Subsystems
Power
- BAT_RAW input via JST-PH 2-pin connector J1.
- USB_VBUS_RAW input via USB-C J5, protected by F1 500 mA resettable fuse.
- BAT_RAW and USB_VBUS_PROT are diode-ORed into VSYS with D3 and D2 respectively.
- TPS63001DRCR generates 3.3 V from VSYS.
- USB-C VBUS is isolated from BAT_RAW so it cannot directly backfeed the LiPo connector.
- This board does not charge the LiPo; battery charging must be external unless a future charger IC is added.
- Local input/output capacitors and a short LX-to-inductor loop are required.
- U3 exposed pad must connect to GND with thermal vias.
Compute / Radio
- ESP32-C3-MINI-1U-N4 module.
- Native USB Serial/JTAG uses GPIO18=USB_DN and GPIO19=USB_DP.
- EN pull-up and reset button.
- GPIO9 boot strap button.
- GPIO2 and GPIO8 strap/pull resistors per schematic.
- Antenna keepout must remain copper-free on all layers in the antenna region.
Motion Sensing
- BMI270 on I2C.
- Place near board center of mass.
- 100 nF decoupling near VDD/VDDIO pins.
External Interfaces
- J1: LiPo input BAT_RAW/GND.
- J2: Motor PWM outputs plus 3V3/GND.
- J3: GPS UART0 and 3.3 V/GND.
- J4: Optional/debug UART0 access; shares UART0 nets with J3, so avoid connecting GPS and external UART simultaneously unless the firmware/electrical setup supports it.
- J5: USB-C native programming/debug and protected USB bench power.
- TP1–TP8: bring-up/debug pads.
Interfaces and Connections
Table
| Net | Purpose |
|---|---|
| BAT_RAW | Raw 1S LiPo input and ADC divider source |
| VSYS | Diode-ORed input to TPS63001 from BAT_RAW or protected USB VBUS |
| USB_VBUS_RAW / USB_VBUS_PROT | USB-C power before/after resettable fuse |
| USB_DP / USB_DN | ESP32-C3 native USB Serial/JTAG via ESD protection |
| 3V3 | Regulated system rail |
| I2C_SDA / I2C_SCL | ESP32-C3 to BMI270 bus with 4.7 kΩ pull-ups |
| IMU_INT1 | BMI270 interrupt to ESP32-C3 GPIO3 |
| MOTOR1..MOTOR4 | PWM outputs to motor connector |
| UART0_TX / UART0_RX | GPS/debug UART shared by J3 and J4 |
| VBAT_SENSE | Battery divider output to ESP32-C3 GPIO0 |
| ESP_EN / BOOT_IO9 | Reset and boot control |
Power and Runtime Expectations
- Primary source: 1S LiPo, assumed operating range approximately 3.0 V to 4.2 V at BAT_RAW.
- USB-C source: 5 V nominal, limited by F1 500 mA hold fuse and intended for programming/bench electronics only.
- Schottky ORing introduces voltage drop; TPS63001 supports the resulting VSYS input for the 3.3 V electronics rail.
- 3.3 V rail must support ESP32-C3 WiFi/BLE peaks, BMI270, pull-ups, status LED, and connector loads.
- Runtime target is not specified yet; battery capacity and motor/ESC interface current are assumptions to confirm.
Power Tree and Power Budget
Current sizing assumption:
Table
| Rail | Load | Typical | Peak / Notes |
|---|---|---|---|
| 3V3 | ESP32-C3 module | ~80–160 mA | WiFi/BLE peaks can exceed 300 mA depending firmware |
| 3V3 | BMI270 | <2 mA | IMU active mode |
| 3V3 | I2C pull-ups | <2 mA | Only during bus low states |
| 3V3 | Status LED | ~10–13 mA | 100 Ω LED resistor used to reduce current |
| 3V3 | GPS expansion power | TBD | Depends on attached GPS module |
| USB_VBUS | Bench/programming input | 0–500 mA | F1 hold current limits USB-powered bench operation |
Worst-case estimate for sizing the buck-boost input at low LiPo voltage:
- Assume 3.3 V rail peak load ≈ 350 mA without external GPS or heavy 3V3 connector load.
- Pout ≈ 3.3 V × 0.35 A = 1.16 W.
- At BAT_RAW=3.0 V, Schottky drop≈0.3–0.45 V, VSYS≈2.55–2.7 V.
- With η≈85%, input current ≈ 1.16 W / (2.55 V × 0.85) ≈ 0.53 A.
- D2/D3 are 1 A Schottky diodes, so the electronics rail has margin for the assumed load.
- The 500 mA USB fuse means USB-powered mode should be used for programming/configuration, not high-power external 3V3 accessories.
Manufacturing and Assembly Expectations
- 4-layer PCB, 40 mm × 40 mm × 1.6 mm.
- 1 oz outer copper, 0.5 oz inner copper.
- Green solder mask, white silkscreen.
- Top-side assembly preferred; bottom side routing allowed.
- 0.12 mm stencil, SAC305 no-clean paste.
- Special paste apertures for BMI270 LGA and TPS63001 exposed pad.
- USB-C connector requires robust shell grounding and mechanical clearance at board edge.
- Assign production MPNs to all generic passives before release.
Firmware-Relevant Hardware Requirements
- I2C bus: ESP32 GPIO4=SDA, GPIO5=SCL.
- IMU interrupt: GPIO3.
- Motor PWM: GPIO6, GPIO7, GPIO10, GPIO1.
- Native USB: GPIO18=USB_DN, GPIO19=USB_DP.
- GPS/debug UART: TXD0/RXD0 shared by J3/J4.
- ADC battery sense: GPIO0 measuring BAT_RAW through divider.
- Boot/reset controls must be available for flashing and recovery.
Physical Design Expectations
- Board: 40 mm × 40 mm rectangle.
- Mounting holes: M2, 2.1 mm drill, 4.0 mm pad/keepout at (4.75,4.75), (35.25,4.75), (4.75,35.25), (35.25,35.25) mm from lower-left origin.
- U1 antenna at board edge with keepout.
- J5 USB-C at board edge with ESD component U4 close to connector pins.
- U2 centered.
- U3/L3/input/output caps tightly clustered away from U2.
- Connectors at board edges and accessible.
Important Design Decisions
- Use ESP32 module rather than bare chip to avoid custom RF design.
- Use 4-layer stackup for contiguous GND reference, power distribution, and compact routing.
- Use buck-boost regulation so the 3.3 V rail remains valid across the LiPo discharge curve.
- Use native ESP32-C3 USB on GPIO18/GPIO19 for USB-C programming/debug, so the GPS interface was moved to UART0 nets.
- Use diode ORing for USB/LiPo production safety rather than tying USB VBUS directly to the battery connector.
- Use 100 Ω LED resistor per assembly drawing instead of the schematic comment’s 33 Ω warning.
Assumptions
- Motor connector carries PWM/control signals, not motor phase/battery current.
- GPS expansion load current is not yet defined.
- USB-C is for device/sink mode only; no USB Power Delivery negotiation is implemented.
- LiPo protection/charging is external to this board unless later requested.
- Exact ESP32-C3-MINI-1U antenna keepout dimensions will be verified from the datasheet before final placement/routing.
Change Notes
- Initial specification created from the uploaded KiCad schematic notes, PCB layout specification, and assembly drawing on 2026-06-01.
- 2026-06-01 update: Added USB-C connector J5, CC pull-downs R10/R11, USB ESD U4, VBUS fuse F1, and D2/D3 ORing diodes; separated BAT_RAW from VSYS; remapped GPIO18/GPIO19 from GPS to native USB and moved GPS to UART0 nets.
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