I’ll move only the FPGA passives blocking U3’s camera-pin sides, keep their electrical groups intact, then rerun DRC and routing feasibility without routing.

Moved FPGA decoupling capacitors C19–C29 outward to open the camera-pin fanout corridors and removed nine resulting stale traces.

I’ll route all remaining J2/J3 camera signals to U3 through the newly opened fanout corridors, then run DRC and report exact residual camera airwires or advisories.

Routed four additional camera connections:

Blocked after two attempts: CAM2_PCLK, CAM2_VSYNC, and CAM1_HREF; remaining camera buses were not safely reachable. DRC shows 0 overlaps, dangling traces, invalid layers, or outside-board components. Board-wide airwires decreased to 166.