Power architecture changed on 2026-08-06. The CM3 is natively battery-powered: its on-module RK817-5 PMU does charging, the power path and gas gauging. The discrete power block — BQ24074, TPS61022 boost, MAX17048 gauge, the second USB-C receptacle and the master slide switch — is deleted. Any such part already present in the schematic is to be removed.

• Portable beltpack for the existing station/software stack.
• Battery-powered field operation with simultaneous operation and charging.
• Prototype/validation build with a path toward a refined rev B product.
• ROCK 3C remains the software-development vehicle; this carrier is the product-hardware target.

• Boot a Radxa CM3 directly from a user-swappable, externally protected 1S 18650 cell on VCC_BAT±.
• Continue operating while the battery is charging from USB-C.
• Report battery state of charge to the application.
• Support either an XLR-4 intercom headset or a CTIA TRRS consumer headset, with software-selected microphone input and connector detection.
• Drive a 240×240 ST7789 display.
• Read an EC11 rotary encoder and its push switch reliably using hardware bias/debounce.
• Read four active-high talk keys mapped to the display's 2×2 slot grid.
• Drive four chained SK6812 MINI-E pixels under the talk keys plus an optional fifth status pixel.
• Read a recessed power/lock key for lock/unlock and clean shutdown.
• Provide externally accessible USB 2.0 flashing/maskrom access.
• Provide optional UART debug access during bring-up.
• Detect both headset connectors and preserve two to three spare GPIOs for future use.

• Radxa CM3 SoM variant RM116-D2E16W2 (2 GB RAM / 16 GB eMMC / WiFi).
• Swappable 1S 18650 cell with mandatory on-board protection IC + polyfuse and spring contacts, wired straight to the CM3's VCC_BAT±.
• Charging, power path and gas gauging performed on-module by the RK817-5 PMU. No carrier-generated rail; no 5 V rail.
• 10 kΩ NTC mounted at the holder and wired to the CM3 TS pin.
• ES8316 I2S audio codec using both microphone inputs, headphone output, and MICBIAS.
• XLR-4 male intercom headset connector and CTIA 3.5 mm TRRS headset connector, used one at a time, with detection on both.
• Socketed ST7789 240×240 SPI display for rev A.
• Panel-mount EC11 encoder, four talk keys, recessed power/lock key, and chained in-key RGB pixels.
• Visible charge-status LED beside the USB-C port.
• A single USB-C receptacle carrying both charge (VBUS) and CM3 USB 2.0 OTG flashing (D±).
• Unpopulated 3-pin UART debug header.
• Four-layer PCB with a continuous ground plane.

Diagram

• Radxa CM3, based on RK3566.
• CM4-compatible connector pair plus the third Radxa expansion connector.
• Three 100-pin, 0.4 mm-pitch board-to-board connectors.
• All carrier pin assignments are resolved and approved in the CM3 Pin-Mapping Checklist, from the official V1.32 pinout table and datasheet Rev 1.2. Wire from that document; do not re-derive.
• Do not infer pin numbers from ROCK 3C header numbering or unverified web pin tables.

• Battery: user-swappable 1S 18650 cell, nominally a quality ~3400 mAh cell such as Samsung 35E or LG MJ1.
• On-board cell protection is mandatory because unknown unprotected cells may be inserted: protection IC + MOSFET pair and a polyfuse between the holder and VCC_BAT±. Overcharge, over-discharge, overcurrent and short-circuit protection, sized for the ~2.9 A transient path target in the Power Budget.
• Cell nets: BAT_P (J1 84/86/88), BAT_N (J1 78/80/82), BAT_TS (J1 90). Battery traces wide and short; BAT_TS routed quiet under ground shield.
• Bare 18650s have no thermistor: mount a 10 kΩ NTC on the carrier, pressed against the holder, wired to BAT_TS.
• Use spring contacts/holder hardware rated for the worst-case cell current; battery-door and ingress details belong to enclosure design.
• Charge input: one USB-C receptacle, 5 V sink only, no USB Power Delivery. VBUS → USB_5V_IN (J1 94/96/98); VBUSDET (J1 97) through the mandatory reference divider (2.2 k / 2.2 k + 22 R).
• USB-C CC1 and CC2 each require a 5.1 kΩ sink pull-down.
• The same receptacle carries D± → USB_OTG0 on J68 103/105 for firmware upgrade and maskrom recovery. The two-port design is deleted.
• Charge-current and input-current-limit behaviour is the PMU's; confirm the RK817-5 limits and that a 5 V/3 A input covers charge plus full load.
• A visible charge-status LED beside the USB-C is required. Which RK817 pin or rail drives it is an open item; a VBUS-present indicator is the fallback.

• The CM3 +3V3 output (J69 84/86) supplies the ES8316, the ST7789 module and backlight, the control pull-ups, and GPIO_VREF (J69 78). All carrier IO is 3.3 V.
• Its available current is the one open sizing gate — see the Power Budget, including the backlight fallback to the battery rail.
• The SK6812 chain runs from BAT_P directly, not from 3V3, with its data level-shifted to that rail by the SN74LV1T34.
• +5V_INPUT on J69 (77–87 odd) is left floating in battery mode; confirm against the CM3 IO Board reference.

• Power on/off is the PMIC's own PWRON_KEY (J69 99), a real hardware power button whose short-press events the HAL reads for UI lock. The master slide switch is deleted; PMIC off-state drain is negligible and a shipping-mode strap can be revisited at DVT.
• PMIC_RESET_KEY (J69 100) on a recessed hidden tact.
• Recovery/maskrom on SARADC_VIN0_KEY/RECOVERY (J69 93, V1.32) — an ADC key; confirm its resistor network against the IO Board reference.

• Gas gauging is performed by the RK817-5 on its internal shunt across VCC_BAT−. No external gauge IC.
• Battery percentage reaches the application through the rk817 kernel driver at /sys/class/power_supply/.

• ES8316 codec, I2C address 0x11.
• CM3 interface: MCLK, SCLK/BCLK, LRCK/WS, processor-to-codec data, codec-to-processor data, and I2C.
• Linux target: everest,es8316 with a simple-audio-card device-tree overlay; conflicting RK809 audio path disabled.
• Two alternative headset connectors are fitted and used one at a time.
• XLR-4 male assignment: pin 1 = mic ground, pin 2 = mic positive, pin 3 = headphone ground, pin 4 = mono headphone positive from HPL. The dynamic microphone input receives no bias.
• CTIA TRRS assignment: tip = left, ring 1 = right, ring 2 = ground, sleeve = microphone. The electret microphone receives MICBIAS through 2.2 kΩ.
• Route the XLR microphone and TRRS microphone to separate ES8316 microphone inputs and select the active source in ALSA controls.
• Verify that the ES8316 PGA gain/noise performance is sufficient for low-output dynamic intercom microphones.
• Jack detection is required on both connectors and surfaced as headset-presence telemetry.
• Keep microphone input routing short, guarded where practical, and separated from the boost converter, SPI, clocks, and I2S traces.

• ST7789 240×240 module connected through a socket/header for rev A.
• Signals: SPI MOSI, SPI clock, chip select, data/command, reset, and backlight control.
• Backlight control should use a suitable GPIO/PWM arrangement appropriate to the display module current; verify whether the selected module includes a backlight resistor/transistor.
• Bare FPC display integration is deferred to rev B.

• EC11 rotary encoder with integrated push switch.
• Three active-low GPIO inputs: channel A, channel B, and push switch.
• Each input requires a 10 kΩ pull-up.
• Hardware debounce/filter target: 10 kΩ / 10 nF per input, finalized so the quadrature timing remains reliable at expected rotation speed.
• Do not rely on RK3566 GPIO character-device bias; bench testing showed it is ignored.
• Four talk keys each use one GPIO with a 10 kΩ pull-down and a switch to 3.3 V; pressed state is HIGH and maps to HAL /key/{slot}.
• Key placement mirrors the display 2×2 grid, with two keys on each side; slot 1 receives a tactilely distinct keycap.
• A recessed top-edge power/lock key uses one GPIO. Short press toggles UI lock while talk keys remain live; long press requests clean shutdown.
• The EC11 encoder is on the bottom edge beside the headset connectors and recessed approximately 2 mm.

• Four SK6812 MINI-E pixels are chained under translucent talk-key caps; an optional fifth top-face status pixel is included as a DNP-able footprint.
• Use one dedicated SPI MOSI-capable output to generate the 800 kHz bitstream; do not share the display SPI bus.
• Verify CM3 logic-high compatibility with the selected SK6812 supply. Add an appropriate level shifter if the guaranteed input threshold is not met.
• Include local bulk capacitance, per-device decoupling as appropriate, and a data-line series resistor following the selected LED datasheet/application guidance.
• Per-slot colors follow existing logic: green = talking, yellow = listening, red = incoming call.

• The single USB-C receptacle connects to CM3 USB 2.0 OTG (J68 103/105) for flashing and recovery, alongside its VBUS charge role.
• Provide the required BOOT_MODE/maskrom strap with clear access and labeling.
• USB-C data-port CC configuration must match a USB device/UFP implementation.
• UART2 TX, RX, and GND on a 3-pin unpopulated header.
• Confirm CM3 UART I/O voltage before exposing the header; do not add 5 V signaling.

• Reserve two to three GPIOs on labeled test points after allocating both jack-detect inputs.
• Provide accessible test points for BAT_P, 3V3, GND, VBUS, VBUSDET, I2C1_SCL, I2C1_SDA, LED_DATA, PWR_BTN and RECOVERY_BTN.

• Nominal load estimate from the brief: approximately 2 W typical and up to approximately 5 W peak for the RK3566 SoM, excluding peripheral loads.
• A quality ~3400 mAh 18650 (≈12.2 Wh) gives approximately 4.7 h at the 2.59 W typical estimate. The 5–6 h target requires an average draw of roughly 2.2 W or below, which depends on SK6812 brightness limiting and backlight management.
• The system must operate while charging; load sharing is the PMU's own behaviour.
• The RK817-5 gauge must expose battery percentage to station telemetry via rk817 at /sys/class/power_supply/.
• Low-battery shutdown behavior and software-controlled soft power are deferred or require definition for rev B.

Diagram

• Fabrication target: JLCPCB or PCBWay.
• Four-layer PCB due to 0.4 mm-pitch B2B connectors, return-path quality, and ground-plane requirements.
• Prefer assembly-compatible, stocked parts where practical; verify JLCPCB availability and substitutions before release.
• Fine-pitch connector footprints and exact mating heights must be validated against the CM3 mechanical specification and selected connector manufacturer drawings.
• Include fiducials, test points, and clear polarity/orientation markings.
• Rev A may use socketed modules and DNP options to reduce integration risk.

• Preserve the existing RK3566-based station, HAL, overlays, and audio-stack assumptions.
• Select exposed CM3 pin muxes compatible with I2S, shared I2C, display SPI, a separate SPI-MOSI-capable LED output, UART2, and required GPIOs.
• Device-tree support is required for ES8316, ST7789, encoder/buttons, headset detection, the rk817 battery/gauge path, and USB OTG/recovery behavior; the SK6812 chain is software-driven through SPI0_MOSI.
• Encoder polarity is active LOW; all four talk keys are pressed HIGH and map to /key/{slot}.
• Lock state must not suppress talk-key operation; it only blocks volume/menu controls.
• Provide maskrom/loader access without opening the enclosure.
• Reserve and document all GPIO assignments and conflicts in the CM3 pin-mapping checklist before schematic wiring.

• CM4-style SoM sandwich using CM3 B2B connectors and M2.5 standoffs on the CM4 mounting pattern.
• Product front: display with two illuminated talk keys on each side, mirroring its 2×2 slot grid; optional status pixel at the top.
• Bottom edge: XLR-4, TRRS jack, and approximately 2 mm recessed encoder.
• Top edge: recessed power/lock key and the single USB-C port under a flap.
• Rear/side: swappable 18650 battery compartment; side belt-clip location remains an enclosure-phase decision.
• The XLR-4 panel connector, approximately 24 mm panel opening plus body depth, is a primary enclosure-sizing constraint.
• Keep the CM3 antenna area free of copper and components per the authoritative mechanical documentation.
• Route the on-module antenna pigtail cleanly to the enclosure antenna.
• Place audio and microphone circuitry away from digital clocks and the SK6812 chain.
• The battery zone is approximately 25 mm thick in a stepped enclosure or approximately 35 mm in a flat enclosure; exact retention, door, and ingress design remain mechanical tasks.

• Use Radxa CM3 rather than a ROCK 3C HAT.
• Retain RK3566 to maximize software reuse.
• Use a four-layer PCB.
• Use a single USB-C port carrying both charge and OTG flashing.
• Use the CM3's on-module RK817-5 PMU for charging, power path and gas gauging; the discrete power block (BQ24074 / TPS61022 / MAX17048) is deleted. ES8316 for audio.
• Replace the master slide switch with the PMIC's native PWRON_KEY.
• Use hardware pull-ups and RC filtering for the EC11 inputs.
• Use a socketed ST7789 module for rev A.
• Use a swappable 18650 with mandatory on-board protection.
• Fit four talk keys and remove the separate oversized PTT.
• Use four chained in-key SK6812 pixels plus an optional fifth status pixel; remove the discrete common-cathode RGB LED.
• Fit both XLR-4 and CTIA TRRS headset connectors with detection on both.
• Keep talk keys active while UI lock is engaged.
• Fit a visible charge-status LED beside the USB-C.
• Fit a dim power-feedback LED on the CM3 +3V3 output near the power key: it lights within milliseconds of PWRON, long before the kernel. Footprint always placed; DNP decision at DVT.
• Defer soft power-off and bare-FPC display integration to rev B.

1. Quantity and procurement timing for RM116-D2E16W2 bring-up spares; two spares are recommended.
2. Final board outline and enclosure dimensions.
3. Selected display module, XLR-4, TRRS jack, USB-C receptacle, 18650 contacts/holder, protection implementation, talk keys, encoder, SK6812 package variant, and B2B connector manufacturer/order codes.
4. The four items under Remaining Open Items in the CM3 Pin-Mapping Checklist: +3V3 output current limit, +5V_INPUT floating in battery mode, the recovery ADC-key network, and the charge-status LED drive.

• The CM3 exposes a usable combination of I2S1_M1, I2C1, SPI3_M0, SPI0_MOSI, UART2, USB 2.0 OTG and sufficient general GPIO across its three connectors. Proven — see the CM3 Pin-Mapping Checklist.
• The carrier does not route PCIe, HDMI, MIPI or eDP. Ethernet is routed: the MDI pairs come off the on-module PHY on J69 to a magjack.
• The CM3 +3V3 output can supply the carrier's peripheral load; this is the one rail assumption still to be verified.
• Rev A prioritizes bring-up access and modularity over minimum size.

• The carrier safely powers the CM3 from the selected battery across the intended state-of-charge range.
• The CM3 boots the same Armbian image used on the bench platform.
• Charging and system operation work simultaneously without resets or unsafe heating.
• Battery percentage is readable and plausible.
• The HAL drives the display and in-key RGB chain and reads all four talk keys, the power/lock key, and encoder reliably.
• Talk keys remain functional while the UI is locked.
• ES8316 plays and captures audio through both the XLR-4 and CTIA headset paths, one at a time, with adequate dynamic-mic gain.
• Both headset-detect inputs report connector presence correctly.
• USB flashing/recovery and UART debug access work as documented.
• No critical ERC/DRC issues remain, and power, antenna, audio, and connector layout constraints have been reviewed.

• 2026-08-07 rev-A capture unblocked. The V1.32 pin map is entered and approved in the CM3 Pin-Mapping Checklist (61 assignments, from the official pinout table + datasheet Rev 1.2). The absence of an RM116-D2E16W2 library part is not a blocker: the three connectors are captured as generic DF40C-100DS-0.4V parts with the documented pin numbers. Capture proceeds.
• 2026-08-07 power architecture correction. This specification previously described a discrete BQ24074 / TPS61022 / MAX17048 power block with two USB-C ports and a master slide switch, carried over from the pre-2026-08-06 brief. That architecture was retired on 2026-08-06 after the CM3 datasheet §3.1.3 review. All affected sections are rewritten; the parts are to be removed from the schematic.
• Power-budget gate narrowed to one item: the CM3 +3V3 output current limit, which now carries the whole peripheral load. Everything else is sized — see the Power Budget.
• Library sourcing evidence recorded: ES8316, SK6812MINI-E, USBLC6-2SC6 (<1 pF USB ESD), SN74LV1T34DBV (LED-data level shifting), USB4105-GF-A USB-C receptacle, 2250506-1 Gigabit MagJack, BQ29700DSER + FS8205A (cell protection), BH-18650-B1BA002 holder.
• 2026-08-06: Initial project specification created from the beltpack carrier PCB brief.
• Architecture changed from a ROCK 3C 40-pin HAT to a direct Radxa CM3 product carrier.
• 2026-08-06 revision: fixed swappable 18650 power architecture with mandatory protection; added dual XLR-4/TRRS audio, four talk keys, chained in-key RGB, power/lock key, visible charge status, and jack detection on both connectors.
• 2026-08-06: selected Radxa CM3 variant RM116-D2E16W2 (2 GB RAM / 16 GB eMMC / WiFi).