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Project Specification
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Diagram
Table
| Source/Rail | Loads | Typical | Design Peak | Sizing basis |
|---|---|---|---|---|
| Battery bus, 39–54.6 V | Three-phase inverter | load-dependent | 70 A | User-agreed controller limit; future battery/BMS must meet it |
| 12 V gate rail | Gate driver and six MOSFET gates | ~0.15 A | 0.5 A | Allows gate-charge and startup transients |
| 5 V sensor rail | Hall sensors, throttle, external sensors | ~0.08 A | 0.25 A | Cable-connected rail with fault margin |
| 3.3 V logic rail | MCU, current-sense amplifiers, CAN/UART logic | ~0.12 A | 0.30 A | Includes ADC/PWM activity and debug interface |
Project Overview
Intended Use
What the Device Should Do
Main Features
System Architecture
Hardware Subsystems
Interfaces and Connections
Power and Runtime Expectations
Power Tree and Power Budget
Manufacturing and Assembly Expectations
Firmware-Relevant Hardware Requirements
Physical Design Expectations
Important Design Decisions
Assumptions
Change Notes