• Status: Schematic review complete; PCB placement/routing intentionally not started.
• Functional, photo-derived reconstruction of an ESP32-WROOM controller board with USB-C programming/power, two independent CAN channels, indicators, controls, breakouts, and a provisional rear harness.
• This is not an exact reverse-engineered OEM schematic. Hidden routing and part markings are replaced with safe, documented engineering assumptions.

• Accept 5 V from USB-C or the rear harness without backfeeding either source.
• Generate a 3.3 V rail for the ESP32 and communications ICs.
• Program and monitor the ESP32 over USB-UART, with automatic and manual boot/reset control.
• Provide two firmware-independent CAN 2.0 channels.
• Expose CAN, debug, GPIO, UART, power, and ground through labeled connectors.

• ESP32-WROOM-32 module with onboard PCB antenna.
• USB-C USB 2.0 device/sink, CH340C USB-UART, CC pull-downs, and USB data ESD protection.
• CAN1: ESP32 native TWAI plus SN65HVD230 transceiver.
• CAN2: MCP2515 SPI CAN controller plus SN65HVD230 transceiver.
• Switchable 120 Ω termination on each CAN channel.
• Manual BOOT/RESET and CH340C DTR/RTS auto-program circuitry.
• 5 V, 3.3 V, status, and CAN-activity LEDs.
• Top CAN header, debug header, two GPIO headers, provisional 12-pin harness, and two mounting holes.

Text
USB-C VBUS --Schottky--+
                       +-- SYS_5V -- AMS1117-3.3 -- 3V3 -- ESP32
Harness 5V --Schottky--+                              |-- CH340C
                                                      |-- CAN1 transceiver
USB D+/D- -- ESD -- CH340C -- UART0 ------------------|-- MCP2515 -- CAN2 transceiver
ESP32 TWAI ---------------------------------------------- CAN1 transceiver

• USB-C is configured as a USB 2.0 sink/device using independent 5.1 kΩ CC1/CC2 pull-downs.
• USB D+/D- pass through USBLC6-2SC6 ESD protection before the CH340C.
• USB and harness 5 V inputs are Schottky-ORed into SYS_5V.
• AMS1117-3.3 reproduces the photographed SOT-223 regulator topology, with 22 µF input/output capacitors, ceramic bypass, and bulk storage.

• ESP32-WROOM-32 at 3.3 V.
• EN: 10 kΩ pull-up, 1 µF delay capacitor, manual reset switch, auto-reset transistor network.
• GPIO0: 10 kΩ pull-up, manual boot switch, auto-boot transistor network.
• Flash-connected GPIO6–11 are intentionally no-connect.

• Native ESP32 TWAI: GPIO25 TX, GPIO26 RX.
• SN65HVD230 transceiver; RS held low for high-speed mode.
• Optional 120 Ω termination through JP1.

• MCP2515 at 3.3 V on SPI: SCK GPIO18, MOSI GPIO23, MISO GPIO19, CS GPIO27, INT GPIO33.
• 8 MHz crystal and reset network.
• SN65HVD230 transceiver; optional 120 Ω termination through JP2.
• Documented deviation: the original photo visibly shows two transceivers, but the original ESP32 only has one native TWAI controller. MCP2515 was added to make CAN2 electrically and firmware independent.

• Manual RESET and BOOT buttons.
• Green 5 V and 3.3 V indicators.
• GPIO16 status LED and GPIO17 CAN/activity LED.

• J6 top CAN: CAN1H, CAN1L, GND, CAN2H, CAN2L, GND.
• J5 debug/program: 3V3, GND, UART0 RXD, UART0 TXD, GPIO0, EN. The library symbol uses JTAG-style pin labels; schematic net names are authoritative.
• J3 left GPIO: 3V3, GND, GPIO32, CAN2_INT/GPIO33, GPIO34, GPIO35, GPIO36, GPIO39.
• J4 right GPIO: 3V3, GND, GPIO4, GPIO13, GPIO14, GPIO15, GPIO2, GPIO5. GPIO2/5/15 are visibly labeled as strapping-sensitive nets and must not be externally forced during reset.

• Powered from USB-C 5 V or an external regulated 5 V harness source.
• No battery or charging subsystem.
• Conservative 3.3 V peak design target: at least 650 mA.

• SMD production-style assembly with through-hole headers.
• Exact connector placement, board outline, antenna keepout, NPTH implementation, copper heatsinking, and mechanical fit are deferred to PCB layout.
• JP1/JP2 use standard 2.54 mm headers and removable shunts.

• Arduino/PlatformIO starter uses native TWAI for CAN1 and MCP_CAN for CAN2.
• UART0 remains the bootloader/console interface.
• External circuits on strapping-pin headers must remain high impedance during reset.

• Match the photographed functional regions during later PCB placement.
• Keep the ESP32 antenna at the lower-left board edge with no copper/component intrusion in its keepout.
• USB-C on the right board edge; harness at the top/rear; two mounting holes in the lower tab.
• No PCB placement or routing has been performed in this revision.

• CH340C selected for broad support and integrated clock.
• SN65HVD230 selected for both 3.3 V CAN physical layers.
• MCP2515 added for valid second CAN controller functionality.
• AMS1117-3.3 retained to reproduce the photo despite thermal and dropout disadvantages.
• Rear harness connector and pinout explicitly marked provisional.

• Harness source is regulated 5 V, not raw vehicle battery voltage.
• CAN bus transient protection beyond the transceivers is not reconstructed because hidden OEM protection cannot be confirmed from photos; external automotive surge validation is required before vehicle deployment.
• 8 MHz MCP2515 crystal load capacitors are initial values and should be validated on the prototype.
• Mounting-hole library parts are schematic/BOM representations; convert to true non-plated holes during PCB layout.

• Active-part support circuits checked against datasheets.
• Every IC power/ground pin connected and decoupled.
• USB-C CC and USB data ESD handled.
• Two independent CAN controllers available to firmware.
• Connectors fully labeled by net; harness explicitly provisional.
• Unused pins marked no-connect or exposed on headers.
• Electrical and schematic review run with no open error/warning results.
• PCB placement/routing — intentionally outside current scope.

• Initial complete schematic created from the two reference photos and supplied architecture decisions.
• Added MCP2515 CAN2 controller to resolve the original ESP32 single-TWAI limitation.