PianoLED C3 Carrier
Worked for 20 sec
No hay un trabajo pausado recuperable, así que iniciaré un autoruteo nuevo sobre la colocación actual y aplicaré su resultado automáticamente.
Thought for 9 mins 15 sec
Autoruteo completado y aplicado: se añadieron 245 segmentos/vías. Ahora revisaré airwires, solapes, trazas colgantes, capas y componentes fuera de placa; corregiré únicamente los bloqueos críticos que aparezcan.
Thought for 7 sec
El auto-layout fue ejecutado y aplicado automáticamente. La colocación existente era válida, por lo que se conservó; el autoruteo conectó la placa añadiendo 245 segmentos de pista y vías.
Pendiente por falta de ACUs:
- Ejecutar la revisión DRC posterior al autoruteo.
- Confirmar que no quedan airwires, solapes ni trazas colgantes.
- Corregir cualquier infracción crítica detectada.
- Revisar/reforzar el camino de 5 V / 8 A con cobre adecuado antes de fabricar.
Check DRC issues
Review 8A path
Prepare fabrication files
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Ask about this doc
Project Specification — PianoLED C3 Carrier Rev C
Project Overview
- Status: Revised schematic phase, awaiting approval before PCB layout.
- Device: Production-oriented carrier PCB with a directly mounted official Espressif ESP32-C3-MINI-1-N4 module.
- Purpose: Provides 5 V / 8 A LED power distribution, external-only ESP32 3.3 V power, USB-C data/programming, and 5 V WS2812 data buffering with minimum practical BOM cost and low complexity.
Required Architecture
The prior pluggable generic ESP32-C3 SuperMini socket architecture is removed. The board now directly mounts an official ESP32-C3-MINI-1-N4 module so the design does not depend on an unknown SuperMini onboard regulator or USB power-path implementation.
Diagram
Intended Use
- Small-series production / commercial prototype carrier for a PianoLED controller.
- External regulated 5.0 V center-positive barrel supply is required for all normal operation, including USB programming/debugging.
- USB-C is for native ESP32-C3 USB CDC serial and USB Serial/JTAG programming/debug only.
Functional Requirements
- Accept regulated 5.0 V external supply, 8 A maximum LED/system input path.
- Route barrel jack +5 V and GND directly to the LED connector high-current path.
- Generate 3.3 V locally from external 5 V using AP63203WU-7.
- Power ESP32-C3-MINI-1-N4 only from 3V3 generated by the AP63203.
- Do not connect USB VBUS to 5V_IN or 3V3.
- Determine from official Espressif references whether VBUS sensing is required; result: no dedicated VBUS sense is required for the native USB Serial/JTAG data path, so no VBUS sense divider is included in this low-cost revision.
- Connect USB D- to GPIO18 and USB D+ to GPIO19 through USB ESD protection and 22 ohm series resistors.
- Use a safe WS2812 GPIO that is not a strapping pin and does not conflict with USB; selected pin is GPIO10.
- Shift ESP32 GPIO10 data from 3.3 V to 5 V using SN74AHCT1G125DBVR powered from 5 V.
Main Features
- Official Espressif ESP32-C3-MINI-1-N4 module, direct SMD mount.
- GlobTek JACK-L-PC-10A-RA(R) high-current center-positive barrel jack; exact manufacturer footprint still required before layout.
- JST B3P-VH(LF)(SN) 3-position LED output: pin 1 +5V, pin 2 DATA, pin 3 GND.
- AP63203WU-7 5 V to 3.3 V buck regulator with datasheet support values.
- USB-C 2.0 device connector with independent CC1/CC2 5.1 kΩ Rd pull-downs.
- USBLC6-2SC6 low-capacitance USB D+/D- ESD protection.
- RESET button on ESP32 EN and BOOT button on GPIO9.
- ESP32 strapping support: GPIO9 pull-up, GPIO2 pull-up, GPIO8 pull-up.
- SN74AHCT1G125DBVR AHCT buffer for robust 5 V WS2812 data.
- Test points retained/updated: TP_5V, TP_3V3, TP_GND, TP_GPIO10, TP_LED_DATA.
ESP32-C3-MINI-1 Official Design Requirements Applied
Sources: Espressif ESP32-C3-MINI-1 datasheet and ESP32-C3 hardware design guidelines.
Table
| Function | Requirement | Implemented |
|---|---|---|
| 3V3 power | 3.0–3.6 V, nominal 3.3 V, external supply capability >=500 mA | AP63203 3V3 rail powers U3 pin 3 |
| Local power caps | 10 µF rail cap and 0.1 µF local decoupling | C7 10 µF and C6 100 nF on 3V3 near U3 |
| EN / CHIP_EN | Must not float; recommended 10 kΩ + 1 µF RC delay | R3 10 kΩ to 3V3, C8 1 µF to GND, SW1 reset to GND |
| Boot button | GPIO9 pulled high; pull low during reset for download/recovery | R4 10 kΩ pull-up, SW2 BOOT to GND |
| GPIO2 strap | Recommended pull-up due to glitches | R5 10 kΩ to 3V3 |
| GPIO8 strap | Must be high for Joint Download Boot with GPIO9 low | R6 10 kΩ to 3V3 |
| USB D- | GPIO18 | USB-C DN1/DN2 → D1 ESD → R9 22 Ω → U3 IO18 |
| USB D+ | GPIO19 | USB-C DP1/DP2 → D1 ESD → R10 22 Ω → U3 IO19 |
| USB VBUS | Not required as ESP32-C3 sense input for USB Serial/JTAG | Kept only as isolated USB_VBUS to connector/ESD reference |
Power Tree and Power Budget
Table
| Rail | Source | Loads | Design Current |
|---|---|---|---|
| 5V_IN / LED_5V | External 5 V adapter via J1 | LED connector J2 pin 1, AHCT VCC, AP63203 VIN | 8 A path rating |
| 3V3 | AP63203 from 5V_IN | ESP32-C3-MINI-1, EN/strap pull-ups | >=500 mA ESP32 requirement; AP63203 rated 2 A |
| USB_VBUS | USB-C host VBUS | Connector VBUS pins and D1 VBUS reference only | Not a board power rail |
| GPIO10_DATA_3V3 | ESP32 GPIO10 | AHCT input, 100 kΩ pulldown, TP_GPIO10 | logic only |
| LED_DATA_5V | AHCT output through 330 Ω | JST-VH DATA, TP_LED_DATA | logic only |
Interfaces and Connections
J1 — GlobTek JACK-L-PC-10A-RA(R)
- CENTER_PIN: 5V_IN.
- SLEEVE/SHIELD: GND.
J2 — JST B3P-VH(LF)(SN)
- Pin 1: 5V_IN / LED +5 V.
- Pin 2: LED_DATA_5V.
- Pin 3: GND.
J3 — USB-C 2.0 Device Connector
- CC1 → R7 5.1 kΩ → GND.
- CC2 → R8 5.1 kΩ → GND.
- DN1/DN2 → USB_D_N_CONN → D1 → R9 22 Ω → U3 GPIO18.
- DP1/DP2 → USB_D_P_CONN → D1 → R10 22 Ω → U3 GPIO19.
- VBUS pins → USB_VBUS only; no connection to 5V_IN or 3V3.
- SBU1/SBU2: no-connect.
Manufacturing and Assembly Expectations
- Low-cost, small-series production target.
- Target PCB: 2 layers, 2 oz copper preferred, 1.6 mm FR4.
- Do not add USB power mux, ideal diode controller, eFuse, or unnecessary power switching.
- Production-critical connector footprints must be exact manufacturer footprints before PCB layout.
- ESP32 module antenna keepout must follow Espressif layout guidance before placement/routing.
Physical Design Expectations
- Place ESP32-C3-MINI-1 antenna at a board edge with Espressif keepout respected.
- Keep AP63203 switching loop and inductor away from the ESP32 antenna area.
- Place USB-C at a board edge with short D+/D- route to ESP32 pins.
- Place barrel jack and JST-VH LED connector near each other.
- Implement 5V_IN and GND LED current paths as short, wide copper pours on both layers; do not use thin traces.
- Place 1000 µF LED bulk capacitor near J2.
Important Design Decisions
- Direct official module replaces generic SuperMini sockets to eliminate uncertain onboard regulator backfeed behavior.
- External 5 V adapter is required even when USB is connected.
- USB VBUS is isolated and not sensed in this revision because official Espressif USB Serial/JTAG documentation does not require a dedicated VBUS sense input.
- GPIO10 is selected for WS2812 data because it avoids USB pins GPIO18/GPIO19 and strapping pins GPIO2/GPIO8/GPIO9.
- GPIO2, GPIO8, and GPIO9 are biased to safe/recoverable boot states.
Open Verification Items Before PCB Layout
- Verify/import exact GlobTek JACK-L-PC-10A-RA(R) footprint from the official manufacturer mechanical drawing.
- Confirm final USB-C connector order code/footprint. Current schematic uses TYPE-C-2.0-16PIN-SMT-3-OR / C2987387; verified pricing was found for the near-identical C2987386 non-OR variant, so the final layout footprint and procurement code must be locked before placement.
- Confirm ESP32-C3-MINI-1-N4 lifecycle/procurement strategy; live LCSC listing exists, but Espressif documentation indicates some N4 variants may be NRND versus newer N4X ordering.
- Define ESP32 antenna keepout and high-current copper rules before placement/routing.
Change Notes
- Rev C revised again per pasted architecture update: removed SuperMini socket architecture and replaced with direct ESP32-C3-MINI-1-N4 plus board-level USB-C.
- Current work remains schematic-only; PCB routing is explicitly deferred until schematic approval.
Project Overview
Required Architecture
Intended Use
Functional Requirements
Main Features
ESP32-C3-MINI-1 Official Design Requirements Applied
Power Tree and Power Budget
Interfaces and Connections
J1 — GlobTek JACK-L-PC-10A-RA(R)
J2 — JST B3P-VH(LF)(SN)
J3 — USB-C 2.0 Device Connector
Manufacturing and Assembly Expectations
Physical Design Expectations
Important Design Decisions
Open Verification Items Before PCB Layout
Change Notes
