Dual Servo Controller PCB Design
Thought for 4 sec
Work done
- Built the dual-PCA9685 schematic with Raspberry Pi 5 I²C input, STM32/Nucleo control header, TXS0102 3.3V↔5.1V translation, 5.1V logic rail, 6.0V servo rail, 17 servo outputs, 220Ω series resistors, and OE pull-up fail-safe.
- Configured U1 at I²C address
0x40and U2 at0x41, renamed the Pi-side TXS0102 rail to3V3_PI, and added no-connect markers for intentionally unused pins. - Set up a 120mm × 100mm 4-layer PCB with an inner ground plane and inner power plane, placed all 52 real components, and added high-current layout metadata/rules for the 20A
6V_SERVOrail. - Updated Design Notes with datasheet confirmations, layout constraints, and validation status.
- ✅ Dual PCA9685 schematic, addressing, OE safety pull-up, I²C translation, common GND, power rails, and 17 protected servo PWM outputs are implemented.
- ✅ PCB stackup and placement are configured for a 4-layer high-current board concept.
- ✅ ERC is clean after marking intentionally unused pins.
- ⚠️ Full DRC clearance is not complete: 84 airwires remain because physical routing/copper pours still need to be completed.
- ⚠️ The stackup records the 2 oz copper requirement in project metadata/design notes, but the visible stackup template still shows default 0.035mm copper thickness; confirm the final fab stackup/copper weight with the board manufacturer.
Complete PCB routing/pours for
GND, 6V_SERVO, 5V1_LOGIC, I²C, OE, VSENSE, and PWM outputs, then re-run DRC until airwires are cleared before manufacturing export.Route power first
Group DRC airwires
Set 2 oz stackup
Verify connector ratings
Prepare exports
Refine this doc
Ask about this doc
Design Notes
Requirements
- Dual PCA9685 servo controller for Raspberry Pi 5 and STM32 Nucleo interface.
- 4-layer PCB with 2 oz copper for 20A servo load support.
- 5.1V logic rail and 6.0V servo rail.
- TXS0102/TXS0102-equivalent 2-bit bidirectional I2C level shifting, LV=3.3V and HV=5.1V.
- PCA9685 chip 1 address 0x40: A0-A5 to GND.
- PCA9685 chip 2 address 0x41: A0 to VCC, A1-A5 to GND.
- OE from STM32 Nucleo PC7/D9, with 10k pull-up to 5.1V for disabled-by-default servo outputs.
- 17 servo PWM outputs total, each with 220 ohm series resistor.
Implementation decisions
- Use PCA9685PW (NXP TSSOP-28) when available.
- Use 4.7k pull-ups on the 5.1V I2C side only if level-shifter datasheet review confirms external pull-ups are appropriate/needed.
- Treat 6.0V servo current as high-current distribution requiring wide copper pours/planes and connector placement near board edge.
Datasheet confirmations
- PCA9685 OE is active low. A high level on OE disables/tri-states outputs according to MODE2 OUTNE configuration, so the 10k pull-up to 5.1V implements disabled-by-default servo outputs.
- PCA9685 address map: base address bits are
1 A5 A4 A3 A2 A1 A0; U1 straps A0-A5 to GND for 0x40, and U2 straps A0 to VDD with A1-A5 to GND for 0x41. - TXS0102 A side supports 1.65V to 3.6V and B side supports 2.3V to 5.5V with VCCA <= VCCB, so 3.3V A-side and 5.1V B-side are valid.
- TXS0102 includes internal 10k pull-ups on each A/B I/O; no external I2C pull-ups were added unless later edge-rate testing shows more pull-up strength is needed.
Layout constraints
- Board size set to 120mm x 100mm with 2mm rounded corners.
- Stackup set to Standard 4 Layer: Top signal, Layer 2 GND plane, Layer 3 power plane, Bottom signal.
- 6V_SERVO rail is treated as a 20A high-current net requiring 2 oz copper and copper pours/planes rather than narrow traces.
Validation status
- ERC warnings for intentionally unused header pins and unused U2 PCA9685 outputs were cleared with no-connect markers.
- DRC checks pass for missing footprints, invalid layers, and overlapping copper.
- Remaining DRC issue: 84 airwires remain because the PCB has been placed but not physically routed yet. Complete routing/pours for all nets, with priority on GND, 6V_SERVO, 5V1_LOGIC, I2C, OE, VSENSE, and PWM outputs.
Requirements
Implementation decisions
Datasheet confirmations
Layout constraints
Validation status
