The connectivity comparison confirms that all 49 nets still connect the same pins. The readability check found more work in the op-amp stages and electrode-jack wiring, which I’m correcting now.
The analog stages now have drawn signal paths, but a wire-placement bug on flipped symbols is blocking part of the USB drawing. I’ll leave the affected connections labeled and finish the independent label fixes; the bug needs Contact Support.
I arranged all 78 components into eight functional blocks and added local wires and net labels. All 49 nets retain exactly the same pin connections; no electrical connections changed.
The drawing is not fully clean: wire crossings and label crowding remain, and a flipped-symbol wire-placement bug blocks the shared USB power wire. That bug needs Contact Support; the remaining drafting cleanup is still open.
Current AD8232/MCP6002 baseline: 71 components / 44 connected nets. All 26 ordinary resistors are 0402. Normal low-voltage DC screens support that package choice, but generic MPNs, temperature/voltage/pulse ratings, effective capacitance/ESR and assembly release remain gates. A package/property is not a manufacturer's qualification. Complete endpoints and tolerances are in Simulation Guide.
Exact limiters and fault locations
R6–R9: RC0402FR-07180KL, 180 kΩ ±1%, LCSC C138046. R27/R28: RC0402FR-07200KL, 200 kΩ ±1%, C114763. Manufacturer ratings: 1/16 W at 70°C, 50 V continuous, 100 V specified overload, 100 ppm/°C.
Table
Minimum-resistance fault screen
3.3 V
5.25 V
Signal pair, 360 kΩ intact
9.26 µA
14.73 µA
One signal resistor shorted, 180 kΩ remains
18.52 µA
29.46 µA
Reference pair, 400 kΩ intact
8.33 µA
13.26 µA
One reference resistor shorted, 200 kΩ remains
16.67 µA
26.52 µA
Rail/midpoint-clamp fault to signal jack, body-facing 180 kΩ only
18.52 µA
29.46 µA
Rail/D5 midpoint fault to sleeve, body-facing 200 kΩ only
16.67 µA
26.52 µA
Do not use full-pair resistance for midpoint-clamp faults. At 5.25 V across a surviving 180 kΩ at −1%, dissipation is 0.155 mW: power margin about 404 against 62.5 mW at the cited condition, voltage ratio 9.52. For 200 kΩ it is 0.139 mW. These are DC screens, not medical, mains or ESD approval. A five-second overload test is not a nanosecond pulse-energy curve. Multiple electrode paths, common-cause shorts, clamp leakage/backpower and isolation faults require whole-system review.
Exhaustive ordinary-resistor screen
Generic design power property is 0.063 W, not an exact qualified part. Screens use conservative individual 3.3 V internal / 5.25 V USB/protection bounds and live tolerances. Require actual working-voltage, derating and pulse curves before purchase; no universal 50 V rating is assigned to generics.
Table
Ref(s), all 0402
Value / tolerance
DC screen / dissipation
Disposition
R1
10 Ω, 1%
5 mA at Rmax: 50.5 mV, 0.2525 mW
Normal DC small; inrush/short unresolved
R2
10 kΩ, 1%
3.3 V: 1.10 mW if BOOT0 strapped
Fits generic design target
R3
10 kΩ, 1%
Full 5.25 V bound: 2.784 mW; normal divider about 0.306 mW
Fits design target
R4/R5
0 Ω, absolute Rmax TBD
Use I²Rmax after selection
Current/power cannot be qualified from nominal zero or percentage tolerance
R6/R7/R8/R9
180 kΩ, 1%
5.25 V each: 0.155 mW
Exact DC rating supported; ESD open
R10/R11
10 MΩ, 1%
3.3 V: 1.10 µW each
DC small; leakage/excess-noise procurement open
R14/R15
100 kΩ, 0.1%
3.3 V: 0.109 mW each; nominal half-rail about 27.2 µW
DC small; ratio target set
R16
8.06 MΩ, 1%
3.3 V: 1.37 µW
DC small; exact high-value/leakage/pulse qualification open
R17
402 kΩ, 0.1%
3.3 V: 27.1 µW
DC small; exact precision/noise qualification open
R19
100 kΩ, 0.1%
3.3 V: 0.109 mW; no DC current with J4 open
DC small; procurement open
R20/R21
287 kΩ, 1%
3.3 V: 38.3 µW each
DC small; procurement open
R22/R23
549 kΩ, 1%
3.3 V: 20.0 µW each
DC small; leakage/layout matter
R24
100 Ω, 1%
Normal DC drop near zero; hypothetical 3.3 V across Rmin: 110 mW
Unrestricted short fails 63 mW screen; actual pulse/current/duty open
R27/R28
200 kΩ, 1%
5.25 V each: 0.139 mW
Exact DC rating supported; ESD open
R29/R30
5.1 kΩ, 1%
Conservative full 5.25 V each: 5.46 mW, ignoring host Rp
Fits design target; derating/voltage procurement open
R31
20 kΩ, 1%
Full 5.25 V bound: 1.392 mW; normal divider about 0.613 mW
Fits design target
Except special R1/R24 faults and unqualified zero-ohm links, largest generic DC bound is 5.46 mW versus 63 mW property, ratio about 11.5. This is not exact-part capacity evidence. Precision/high-value availability is a procurement gate, not evidence that 0402 is electrically impossible.
R1 initial nominal demand into discharged analog capacitance is 0.33 A / 1.089 W from 3.3 V. An illustrative upper energy screen with 12.4 µF and full rail is about 68 µJ; actual C22 charges through its divider and actual regulator rise/current limit changes the waveform. Use effective C and the selected resistor pulse curve. Continuous rail short can exceed the rating. R24 similarly needs actual MCP current-limit/thermal/duty qualification; neither fault is declared safe because normal dissipation is low.
C23 stable timing-capacitor exception
Exact GRM31C5C2A104JA01L, 100 nF ±5%, C0G, 100 V, 1206, C405303. Manufacturer dimensions are 3.2±0.2 × 1.6±0.2 × 1.6±0.2 mm; cited coefficient 0±30 ppm/°C over 25–125°C relative to 25°C.
IR product >500 Ω·F implies >5 GΩ under the room-temperature/rated-voltage test. Simplified servo leakage inference at 300 mV electrode offset gives about 0.484 mV IAOUT residual, not a complete AD DC or hot-leakage guarantee. R16 = 8.06 MΩ with this capacitor gives 19.7463 Hz nominal / 18.6198–20.9955 Hz endpoint corner. The larger package is justified by a sourced stable part, not worldwide smaller-part nonavailability.
Remaining capacitor/package gates
C24/C25/C26/C27: live generic 1.2 nF / 1 nF / 1.5 nF / 220 pF, 5%, C0G, 50 V, 0402. No mismatched MPN is retained. C30 = 10 nF, 5%, C0G, 0402 also needs exact procurement. Accepted resistor 1% / capacitor 5% spread is not an added precision blocker.
C2/C3/C12 are 1 µF, 10%, X7R, 0402. C22 is 1 µF, 20%, 0402 with dielectric/effective-C qualification open. Tolerance does not cover DC-bias loss.
C1/C4/C5/C10/C11 remain 0603 pending exact effective-C/ESR/temperature data, not a universal size rule. C11 requires 4.7 µF ceramic and ESR <1 Ω at actual core bias.
U2 requires 0.47–200 µF effective output C and ESR ≤100 mΩ. Nameplate sum is not proof.
C6–C9/C13–C15/C21/C29 are 100 nF, 10%, X7R, 0402 design targets; local placement/effective C still matter.
F1 is an 0805 PPTC, not an ordinary resistor. Connector/IC/crystal packages remain device-specific.
Completed: normal-DC design screen and exact limiter/C23 ratings. Open: generic procurement, R1/R24 pulse/short conditions, effective C, assembly and hot-leakage checks. These do not imply failed normal operation or completed system release. Qualified whole-system external isolation/leakage/fault review is mandatory before human connection.