Linux Cyberdeck Design

There’s still a moderate amount left before this is a full manufacturable board. The first-pass schematic is started, but we are not ready for PCB layout/manufacturing yet.
Main things still left to figure out
  1. Display connection
    • Exact Waveshare 6.25" DSI LCD-B connector pinout
    • DSI lane count
    • Backlight power/current
    • Touch interface, if any
    • Correct FPC connector part
  2. Battery and power
    • Exact 10,000 mAh battery pack
    • Battery connector/current rating
    • Battery protection/NTC details
    • Confirm charger settings for that pack
    • Validate 5 V boost converter can handle CM5 + LTE + display + USB-A peaks
  3. Protection parts
    • USB-C ESD protection
    • USB-A USB 3.0 ESD protection
    • HDMI ESD protection
    • SIM card ESD protection
    • Possibly battery/input fuse or protection
  4. Regulator final values
    • Final inductor part numbers
    • Capacitor voltage/package choices
    • TPS61288 compensation check
    • Thermal/current margin check
    • Layout-sensitive switching-node constraints
  5. CM5 details
    • Decide whether to add RTC backup for CM5 VBAT
    • Decide whether to expose nRPIBOOT/service pads
    • Confirm GPIO assignments for LTE, audio, IMU, keyboard wake
  6. LTE/SIM7600 details
    • Confirm exact SIM7600G-H-M.2 hardware guide handling for VDD_AUX and VDD_1V8
    • Confirm LTE/GNSS antenna connector placement strategy
    • Add SIM ESD
    • Add RF/layout keepout rules
  7. Keyboard board
    • Main-board FPC is planned, but keyboard PCB itself still needs to be designed
    • Need switch/keycap sourcing
    • Need keyboard RP2040 schematic/firmware pin map finalized
  8. Mechanical basics
    • Rough board size
    • Port locations
    • Battery location
    • Screen/keyboard placement constraints
    • Mounting holes
    • Antenna placement/keepouts
  9. PCB layout setup
    • Stackup choice, likely 6-layer because of USB 3.0, HDMI, MIPI DSI, RF, and power density
    • Controlled-impedance rules
    • Differential-pair rules
    • Power trace/current rules
    • Thermal copper areas
  10. Bring-up and manufacturing prep
  • Test pads
  • Debug headers
  • Board bring-up checklist
  • BOM cleanup
  • Footprint review
  • DRC
  • Gerbers/BOM/pick-and-place
My estimate
Schematic is roughly 55–65% figured out.
Full board readiness is more like 30–40% complete, because layout, power validation, protection, display details, and mechanical constraints are still significant.
The biggest blockers are:
  1. Exact display connector/pinout
  2. Exact battery pack
  3. Power validation for the 5 V rail
  4. ESD/protection parts
  5. Mechanical board size/port placement
  6. Keyboard PCB design
Once those are decided, the remaining work becomes much more straightforward.
Power, display, protection
Find display pinout
Validate power rail
Add protection parts
Add test pads
Review battery connector
J4
U11
Y1
Resistance
60 ohms
U5
J2
U4
U3
J12
J3
U1
J6
U10
U1 SD_DAT0 - J3 DAT0
U1 HDMI0_TX2_P - J4 1
U1 USB3_0_TX_P - J2 STDA_SSRX+
U4 FB_2 - R13 P2
U2 DRAIN_1 - U2 DRAIN_2
L4 P2 - U4 SW_1
U11 STATUS - U1 GPIO12
U5 VOUT - R15 P1
U6 FB - R11 P2
U2 DRAIN_1 - U2 DRAIN_2
U3 BAT_2 - U3 BATP
U3 SYS - U4 VIN_1
U11 USIM_CLK - J12 CLK
U2 ADCIN1 - R1 P2
U3 SCL - U2 I2CT_SCL
U2 ADCIN1 - R1 P2
U3 SW2 - L3 P2
U2 DRAIN_1 - U2 DRAIN_2
L6 P2 - C9 P1
U2 LDO_3V3 - C2 P1
U1 HDMI0_CEC - J4 13
U2 LDO_1V5 - C3 P1
R19 P2 - C23 P1
J1 CC1 - U2 CC1
L6 P2 - C9 P1
U1 SD_CLK - J3 CLK
U2 LDO_1V5 - C3 P1
U7 USBDM_DN2/PRT_DIS_M2 - J5 3
L6 P2 - C9 P1
U7 USBDP_DN2/PRT_DIS_P2 - J5 4
U3 SCL - U2 I2CT_SCL
U4 COMP - R19 P1
U1 USB3_0_RX_P - J2 STDA_SSTX+
U3 SYS - U4 VIN_1
J1 CC2 - U2 CC2
U1 SD_DAT3 - J3 CD/DAT3
U5 VOUT - R15 P1
J1 CC1 - U2 CC1
U2 DRAIN_1 - U2 DRAIN_2
U7 PLLFILT - C20 P1
U1 HDMI0_TX0_P - J4 7
U3 SW2 - L3 P2
U7 XTALIN/CLKIN - Y1 XTAL_1
U1 SD_CMD - J3 CMD
U1 HDMI0_HOTPLUG - J4 19
U2 PPHV_3 - U2 PPHV_4
U1 USB3_0_TX_P - J2 STDA_SSRX+
U1 GPIO18 - U10 BCLK
R19 P2 - C23 P1
U11 USIM_CLK - J12 CLK
U7 CRFILT - C19 P1
U1 GPIO19 - U10 LRCLK
R13 P1 - C13 P1
L6 P2 - C9 P1
J5 5 - U1 POWERBUTTON
U3 REGN - C25 P1
J1 DP1 - J1 DP2
U1 HDMI0_TX1_N - J4 6
R13 P1 - C13 P1
L6 P2 - C9 P1
J1 DP1 - J1 DP2
U2 LDO_3V3 - C2 P1
U11 USIM_DATA - J12 I/O
U2 ADCIN3 - R3 P2
U1 HDMI0_CLK_N - J4 12
U1 USB3_0_RX_N - J2 STDA_SSTX-
U12 INT2 - U1 GPIO25
U3 REGN - C25 P1
U2 PPHV_3 - U2 PPHV_4
U4 COMP - R19 P1
U1 +5V(INPUT)__5 - U9 IN
U3 SDA - U2 I2CT_SDA
U3 SW1 - L3 P1
U1 HDMI0_TX0_P - J4 7
U7 XTALOUT - Y1 XTAL_2
U3 PROG - R18 P1
U10 ~SD_MODE - U1 GPIO23
U10 ~SD_MODE - U1 GPIO23
U1 SD_CLK - J3 CLK
U5 L1 - U5 L1
U5 FB - R15 P2
L6 P2 - C9 P1
L6 P2 - C9 P1
U5 VOUT - R15 P1
U5 VIN - U5 VINA
U1 HDMI0_TX1_N - J4 6
U2 PPHV_3 - U2 PPHV_4
U6 FB - R11 P2
J7 1 - U3 BAT_1
U7 XTALOUT - Y1 XTAL_2
U3 SDA - U2 I2CT_SDA
U1 HDMI0_TX0_N - J4 9
U11 USIM_DATA - J12 I/O
U1 +5V(INPUT)__5 - U9 IN
HDMI0_UTILITY_NC
U11 USIM_RST - J12 RST
U3 SDA - U2 I2CT_SDA
U9 EN - U1 VBUS_EN
U3 BAT_2 - U3 BATP
U2 ADCIN4 - R5 P2
U1 HDMI0_SDA - J4 16
U1 HDMI0_CLK_N - J4 12
U5 L1 - U5 L1
U2 LDO_1V5 - C3 P1
U1 SD_DAT2 - J3 DAT2
U3 SYS - U4 VIN_1
U1 USB3_0_DP - J2 D+
J5 5 - U1 POWERBUTTON
U11 MAIN_ANT - J9 SIG
U1 SD_DAT2 - J3 DAT2
U1 SD_DAT1 - J3 DAT1
U3 SCL - U2 I2CT_SCL
U2 ADCIN4 - R5 P2
KBD_SPARE
U2 ADCIN1 - R1 P2
U2 VBUS_IN_3 - U2 VBUS_IN_4
U2 DRAIN_1 - U2 DRAIN_2
U5 L2 - U5 L2
U5 VIN - U5 VINA
U11 ~RESET - U1 GPIO6
J1 VBUS_B__1 - U2 VBUS_IN_1
U11 USIM_VDD - J12 VCC
U7 USBDP_DN2/PRT_DIS_P2 - J5 4
L6 P2 - C9 P1
R13 P1 - C13 P1
R13 P1 - C13 P1
U11 GNSS_ANT - J11 SIG
U3 BTST2 - C18 P1
U3 SW1 - L3 P1
U9 ILIM - R9 P1
U7 USBDP_DN1/PRT_DIS_P1 - U11 USB_DP
U4 SW_2 - C11 P2
U1 HDMI0_SCL - J4 15
U3 TS_2 - R20 P2
U3 PROG - R18 P1
J1 DP1 - J1 DP2
L4 P2 - U4 SW_1
U3 TS_2 - R20 P2
R13 P1 - C13 P1
J1 CC1 - U2 CC1
U12 INT2 - U1 GPIO25
U6 SW - L6 P1
L6 P2 - C9 P1
U11 GNSS_ANT - J11 SIG
U11 AUX_ANT - J10 SIG
R13 P1 - C13 P1
C11 P1 - U4 BST
J1 CC2 - U2 CC2
U5 VIN - U5 VINA
U3 SYS - U4 VIN_1
J1 DN1 - J1 DN2
U10 OUTN - J8 2
U2 LDO_3V3 - C2 P1
R7 P1 - R8 P1
U2 LDO_3V3 - C2 P1
U1 USB3_1_DM - U7 USBDM_UP
U7 RBIAS - R17 P1
L6 P2 - C9 P1
U4 FB_2 - R13 P2
C11 P1 - U4 BST
U1 GPIO21 - U10 DIN
U11 ~PWRKEY - U1 GPIO5
U5 L2 - U5 L2
U1 GPIO19 - U10 LRCLK
U1 USB3_1_DP - U7 USBDP_UP
U4 VIN_2 - U5 VIN
U3 SYS - U4 VIN_1
U1 HDMI0_HOTPLUG - J4 19
U3 BTST1 - C17 P1
U1 USB3_0_DP - J2 D+
L6 P2 - C9 P1
U4 VIN_2 - U5 VIN
U9 ILIM - R9 P1
U1 GPIO18 - U10 BCLK
U5 L2 - U5 L2
U10 OUTP - J8 1
U4 VCC - C12 P1
U1 SD_DAT1 - J3 DAT1
U7 XTALIN/CLKIN - Y1 XTAL_1
U11 AUX_ANT - J10 SIG
U11 USIM_RST - J12 RST
U11 MAIN_ANT - J9 SIG
U11 FLIGHTMODE - U1 GPIO13
U2 VBUS_IN_3 - U2 VBUS_IN_4
U1 USB3_0_TX_N - J2 STDA_SSRX-
J1 DN1 - J1 DN2
U1 HDMI0_CLK_P - J4 10
U1 USB3_0_DM - J2 D-
U2 LDO_1V5 - C3 P1
U11 ~RESET - U1 GPIO6
U1 USB3_0_TX_N - J2 STDA_SSRX-
R13 P1 - C13 P1
J1 DN1 - J1 DN2
U7 RBIAS - R17 P1
J1 VBUS_B__1 - U2 VBUS_IN_1
U2 VBUS_IN_3 - U2 VBUS_IN_4
U3 SCL - U2 I2CT_SCL
U1 HDMI0_SCL - J4 15
U6 SW - L6 P1
U1 +5V(INPUT)__5 - U9 IN
U2 LDO_3V3 - C2 P1
U7 XTALOUT - Y1 XTAL_2
U10 OUTN - J8 2
U5 L1 - U5 L1
U3 SW2 - L3 P2
U5 VOUT - R15 P1
L6 P2 - C9 P1
U9 OUT - J2 VBUS
U9 ~{FAULT} - R10 P1
U2 LDO_3V3 - C2 P1
U7 USBDM_DN2/PRT_DIS_M2 - J5 3
U11 FLIGHTMODE - U1 GPIO13
U3 BAT_2 - U3 BATP
U3 SDRV_2 - C26 P1
U4 COMP - R19 P1
U3 SDRV_2 - C26 P1
U12 INT1 - U1 GPIO24
U5 VIN - U5 VINA
U9 EN - U1 VBUS_EN
U7 USBDM_DN1/PRT_DIS_M1 - U11 USB_DN
U7 USBDP_DN1/PRT_DIS_P1 - U11 USB_DP
U1 USB3_0_RX_P - J2 STDA_SSTX+
U2 PPHV_3 - U2 PPHV_4
U7 USBDM_DN1/PRT_DIS_M1 - U11 USB_DN
U1 HDMI0_TX1_P - J4 4
R7 P1 - R8 P1
U6 FB - R11 P2
U1 GPIO21 - U10 DIN
R7 P1 - R8 P1
U3 SCL - U2 I2CT_SCL
U5 FB - R15 P2
U2 PPHV_3 - U2 PPHV_4
U2 ADCIN3 - R3 P2
U1 USB3_0_DM - J2 D-
U7 CRFILT - C19 P1
U2 VBUS_2 - U2 VBUS_3
U7 XTALIN/CLKIN - Y1 XTAL_1
U2 VBUS_2 - U2 VBUS_3
U1 SD_CMD - J3 CMD
U1 SD_DAT3 - J3 CD/DAT3
U1 HDMI0_TX2_N - J4 3
U1 SD_DAT0 - J3 DAT0
R13 P1 - C13 P1
U11 STATUS - U1 GPIO12
U1 HDMI0_CEC - J4 13
U1 HDMI0_TX2_N - J4 3
U3 BTST1 - C17 P1
U4 SW_2 - C11 P2
U1 USB3_1_DP - U7 USBDP_UP
U3 BTST2 - C18 P1
U2 VBUS_2 - U2 VBUS_3
U1 USB3_0_RX_N - J2 STDA_SSTX-
U4 FB_2 - R13 P2
U10 OUTP - J8 1
U2 ADCIN4 - R5 P2
U11 USIM_VDD - J12 VCC
U1 HDMI0_SDA - J4 16
U1 HDMI0_TX1_P - J4 4
U3 SDA - U2 I2CT_SDA
U9 ~{FAULT} - R10 P1
U5 FB - R15 P2
U3 REGN - C25 P1
U1 USB3_1_DM - U7 USBDM_UP
U5 VIN - U5 VINA
U1 HDMI0_TX0_N - J4 9
L6 P2 - C9 P1
U12 INT1 - U1 GPIO24
U3 SDA - U2 I2CT_SDA
R13 P1 - C13 P1
U7 PLLFILT - C20 P1
U11 ~PWRKEY - U1 GPIO5
U4 VCC - C12 P1
U3 SW1 - L3 P1
U1 HDMI0_CLK_P - J4 10
J7 1 - U3 BAT_1
U9 OUT - J2 VBUS
U3 TS_2 - R20 P2
U3 REGN - C25 P1
L6 P2 - C9 P1
U1 HDMI0_TX2_P - J4 1
U2 ADCIN3 - R3 P2
J1 CC2 - U2 CC2
U5 PGND - U6 GND
J3 VSS - J3 9
C23 P2 - C24 P2
U7 VSS - R17 P2
GND
U11 GND - U11 GND
U7 VSS - R17 P2
R14 P2 - C13 P2
U11 GND - U11 GND
U11 GND - U11 GND
U5 PGND - U6 GND
C1 P2 - C2 P2
J5 2 - J5 MP1
U2 GND_10 - C5 P2
GND
GND
U2 GND_5 - U2 GND_6
U11 GND - U11 GND
U7 VSS - R17 P2
J1 GND_B__1 - J1 SHIELD
J1 GND_A__1 - J1 GND_B
J4 11 - J4 17
U2 GND_10 - C5 P2
U4 AGND - U5 GND
U2 GND_5 - U2 GND_6
U8 EP - RT1 2
R14 P2 - C13 P2
J10 GND - J11 GND
J4 11 - J4 17
C1 P2 - C2 P2
U10 GAIN_SLOT - U12 GND
C1 P2 - C2 P2
U11 GND - U11 GND
C23 P2 - C24 P2
GND
U5 PGND - U6 GND
R14 P2 - C13 P2
U11 GND - U11 GND
R12 P2 - C9 P2
J3 VSS - J3 9
U11 GND - U11 GND
U7 VSS - R17 P2
C25 P2 - U3 ~CE
U11 GND - U11 GND
J1 SHIELD__1 - U2 GND_1
U11 GND - U11 GND
U2 GND_10 - C5 P2
U2 GND_10 - C5 P2
U11 GND - U11 GND
U11 GND - U11 GND
R14 P2 - C13 P2
J7 2 - U3 GND
U11 GND - U11 GND
GND
U11 GND - U11 GND
U5 PGND - U6 GND
R14 P2 - C13 P2
U11 GND - U11 GND
U11 GND - U11 GND
GND
R14 P2 - C13 P2
U9 GND - J2 GND
R12 P2 - C9 P2
J9 GND - J10 GND
U1 GND__50 - J4 2
U2 GND_10 - C5 P2
U11 GND - U11 GND
R12 P2 - C9 P2
U4 AGND - U5 GND
U8 EP - RT1 2
U7 VSS - R17 P2
J3 VSS - J3 9
U7 VSS - R17 P2
U11 GND - U11 GND
C1 P2 - C2 P2
J3 VSS - J3 9
C25 P2 - U3 ~CE
J1 GND_B__1 - J1 SHIELD
J7 2 - U3 GND
U9 GND - J2 GND
U11 GND - U11 GND
J5 2 - J5 MP1
J1 SHIELD__1 - U2 GND_1
J7 2 - U3 GND
U11 GND - U11 GND
J2 SHIELD - R9 P2
GND
R6 P2 - U2 RESERVED_1
U2 GND_5 - U2 GND_6
U2 RESERVED_2 - U2 RESERVED_3
C25 P2 - U3 ~CE
U8 EP - RT1 2
GND
U11 GND - U11 GND
GND
U11 GND - U11 GND
U11 GND - U11 GND
U7 VSS - R17 P2
J3 VSS - J3 9
C23 P2 - C24 P2
U11 GND - U11 GND
U7 VSS - R17 P2
U5 PGND - U6 GND
GND
J10 GND - J11 GND
C1 P2 - C2 P2
R14 P2 - C13 P2
R6 P2 - U2 RESERVED_1
J9 GND - J10 GND
U2 RESERVED_2 - U2 RESERVED_3
J2 SHIELD - R9 P2
J3 VSS - J3 9
J1 GND_A__1 - J1 GND_B
U1 GND__50 - J4 2
U5 PGND - U6 GND
U7 VSS - R17 P2
GND
U11 GND - U11 GND
C1 P2 - C2 P2
J3 VSS - J3 9
U5 PGND - U6 GND
U5 PGND - U6 GND
U10 GAIN_SLOT - U12 GND
U11 GND - U11 GND
C4
Capacitance
2.2uF
R2
Resistance
10kΩ
C14
Capacitance
22uF
C9
Capacitance
10uF
R3
Resistance
162kΩ
R13
Resistance
732kΩ
R17
Resistance
12kΩ
C6
Capacitance
100uF
C1
Capacitance
10uF
R1
Resistance
200kΩ
R15
Resistance
1.21MΩ
R16
Resistance
180kΩ
C23
Capacitance
1nF
U8
C5
Capacitance
4.7uF
C11
Capacitance
100nF
R18
Resistance
6.04kΩ
C3
Capacitance
10uF
C16
Capacitance
22uF
C8
Capacitance
330pF
C15
Capacitance
22uF
R8
Resistance
3.3kΩ
C20
Capacitance
100nF
R4
Resistance
38.3kΩ
C24
Capacitance
30pF
R20
Resistance
10kΩ
C17
Capacitance
47nF
R19
Resistance
36.5kΩ
R14
Resistance
100kΩ
C7
Capacitance
330pF
C10
Capacitance
4.7uF
C18
Capacitance
47nF
C12
Capacitance
2.2uF
C26
Capacitance
1nF
C13
Capacitance
22uF
R10
Resistance
100kΩ
R11
Resistance
453kΩ
C25
Capacitance
4.7uF
C21
Capacitance
18pF
C19
Capacitance
100nF
R12
Resistance
100kΩ
R5
Resistance
200kΩ
C2
Capacitance
10uF
R9
Resistance
28.7kΩ
C22
Capacitance
18pF
R6
Resistance
10kΩ
R7
Resistance
3.3kΩ
L3
Inductance
1uH
J5
L4
Inductance
2.2uH
U12
U9
J10
J9
J1
J8
J7
J11
U6
RT1
Resistance
10kΩ
L6
Inductance
2.2uH
U7
L5
Inductance
1.5uH
U2

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Project Specification — Linux Cyberdeck
Project Overview
Status: Draft / architecture review required before schematic capture. Updated direction: Raspberry Pi Compute Module 5 carrier, tablet-style battery, custom keyboard PCB based on M5Stack CardKB proportions, and Waveshare 6.25inch DSI LCD (B) as the display candidate.
A portable Linux cyberdeck built around a Raspberry Pi Compute Module 5 carrier board with LTE/GNSS connectivity, LoRa, USB-C PD charging plus USB 2.0 gadget/rpiboot data, USB-A 3.0 host, HDMI, a Waveshare DSI display, split custom keyboard PCB, microSD storage, mono speaker, and compact clamshell battery power.
Intended Use
  • Portable Linux computer / cyberdeck prototype.
  • User-facing compute, networking, radio, display, keyboard, audio, and battery operation.
  • Current stage: requirements capture and architecture selection; schematic capture should not begin until the compute module, screen/keyboard interface, and battery architecture are confirmed.
What the Device Should Do
  • Boot and run Linux on Raspberry Pi Compute Module 5.
  • Use selected CM5 SKU SC1598 / CM5108000: 8 GB RAM, Lite / 0 GB eMMC, wireless.
  • Support LTE Cat-4 cellular data and GNSS using a SIM7600G-H-M.2 module.
  • Support LoRa using an RP2040-LoRa development board with SX1262.
  • Provide one USB-C port for power and data.
  • Provide one USB-A 3.0 host port.
  • Provide one HDMI port.
  • Connect to the specified screen/keyboard assembly.
  • Drive a small speaker.
  • Operate from a battery connection and support charging/power-path behavior.
Main Features

Table


FeatureBaseline DirectionStatus
Main computeRaspberry Pi CM5 SC1598 / CM5108000, 8 GB RAM, Lite / 0 GB eMMC, wirelessSelected
Cellular/GNSSSIM7600G-H-M.2 over USB 2.0, with SIM socket and antennasFeasible, needs exact carrier details
LoRaWaveshare RP2040-LoRa daughterboard, preferably as pluggable moduleFeasible, band decision needed
USB-CPD sink/UFP charging plus USB 2.0 device/gadget/rpiboot dataConfirmed
USB-AUSB 3.0 host portFeasible if compute platform exposes USB 3.x host
HDMIExternal HDMI connector and/or internal display feedBlocking decision
DisplayWaveshare 6.25inch DSI LCD (B), 720 x 1560, MIPI DSI + I2C touchCandidate selected; SOM compatibility must be checked
Keyboard2-layer keyboard PCB, 60-key tactile/keycap matrix, RP2040 + QMK, USB HID over FPCConfirmed
StoragemicroSD card slot connected to CM5 Lite SDIO storage interfaceDirection selected
AudioI2S or USB audio to small class-D speaker amplifierNeeds compute platform interface and speaker spec
Battery2S Li-ion or USB-C PD power-bank style architecture recommendedUser decision needed
System Architecture
Recommended baseline: design a custom carrier around Raspberry Pi Compute Module 5. CM5 already includes the processor, LPDDR4x, PMIC sequencing, boot-critical hardware, and Raspberry Pi software support. The carrier handles battery power, USB, LTE/GNSS M.2, LoRa, display, keyboard, audio, and external connectors.

Diagram


Battery Pack Charger / Power Path USB-C Power/Data 5V System Rail 3.8V LTE Rail 3.3V Control/RF Rail RK3588-class SOM or SBC SIM7600G-H-M.2 LTE/GNSS RP2040-LoRa SX1262 Board Optional USB Hub Keyboard / Touch USB USB-A 3.0 Host HDMI Connector Internal Display Interface TBD Class-D Speaker Amp Small Speaker
Hardware Subsystems
Compute
  • Selected direction: Raspberry Pi Compute Module 5 carrier board.
  • CM5 variants support 2 GB, 4 GB, 8 GB, and 16 GB LPDDR4x; use 8 GB minimum.
  • Selected CM5 is Lite / 0 GB eMMC, so the carrier will provide a microSD card slot for boot/storage.
  • Selected CM5 is wireless-capable, so enclosure antenna clearance or external antenna strategy must be handled.
  • CM5 main input is 5 V and the carrier power system must support CM5 peak current plus display, USB, LTE, speaker, and battery charging loads.
Cellular / GNSS
  • Target module: SIM7600G-H-M.2 / SIM7600X-H-M2 family.
  • Supply range found: 3.3–4.2 V.
  • Power rail must support approximately 2 A-class transmit bursts with large low-ESR bulk capacitance near the module.
  • Host interface is USB 2.0; route as 90 ohm differential pair.
  • Needs SIM/eSIM decision, cellular antenna, diversity antenna decision, GNSS antenna decision, RF keepouts, and regulatory review.
LoRa
  • Target board appears to be Waveshare RP2040-LoRa with SX1262.
  • Board size found: 21 mm x 41 mm.
  • Frequency options:
    • LF: 410–525 MHz.
    • HF: 850–930 MHz.
  • Antenna connector: onboard IPEX with included IPEX-to-SMA adapter cable.
  • Interface to Linux host should be decided: USB, UART, or a carrier-level debug/programming path.
Display
  • Candidate: Waveshare 6.25inch DSI LCD (B), 720 x 1560 IPS capacitive touch display.
  • Interface: Raspberry Pi-style 2-lane MIPI DSI plus I2C touch.
  • Power: 5 V panel power plus 3.3 V/I2C side signals per Waveshare pinout.
  • Advantage: documented for Raspberry Pi DSI overlays, making CM5 a better match than an arbitrary RK3588 SOM.
  • Verify exact CM5 DSI connector mapping/cable orientation before schematic capture.
Keyboard
  • Reference: M5Stack Unit CardKB / CardKB v1.1.
  • Reference interface: I2C at address 0x5F over HY2.0-4P/Grove-style connector with GND, 5 V, SDA, SCL.
  • Reference size: approximately 84–88 mm x 54 mm x 5 mm depending revision.
  • User direction: design a custom keyboard PCB slightly longer than CardKB.
  • Recommended implementation: direct-wired keyboard matrix on the main board, scanned by a small onboard keyboard MCU, exposed to CM5 as USB HID with optional wake/power sideband GPIO.
USB
  • USB-C role is currently ambiguous and must be defined before schematic capture.
  • USB-A 3.0 requires a compute platform with USB 3.x host capability and controlled-impedance routing.
  • Internal peripherals may exceed available host ports; likely need a USB 2.0 hub for LTE, keyboard/touch, LoRa, and debug if these are USB.
HDMI
  • External HDMI is feasible but requires 100 ohm differential routing, ESD protection, DDC, hot-plug detect, connector shield strategy, and 5 V HDMI power.
  • If the internal screen also needs HDMI, the compute platform must support multiple display outputs or the design must choose between internal display and external HDMI.
Audio
  • Small speaker path should use a dedicated class-D amplifier.
  • Interface depends on compute platform: I2S preferred if exposed; USB audio is fallback.
  • Speaker impedance and power target are needed.
Interfaces and Connections

Table


InterfaceProposed Electrical PathNotes
USB-CUSB-C connector + CC/PD controller + ESD + power pathRole TBD
USB-A 3.0RK/SOM USB 3.x host to USB-A connector85 ohm SuperSpeed pairs
HDMIRK/SOM HDMI output to HDMI connector100 ohm diff pairs
LTE modemUSB 2.0 host/hub to M.2 module90 ohm USB pair; 3.8 V burst rail
SIMSIM7600 module USIM pins to SIM socket/eSIMAdd ESD near SIM socket
GNSS/LTE RF50 ohm RF paths to antennas/connectorsAntenna plan required
LoRaUSB/UART to RP2040-LoRa daughterboardBand and connector TBD
SpeakerI2S/USB audio to class-D ampSpeaker spec TBD
Screen/keyboardTBD: likely USB-C/USB/HDMI-style external cablePinout unknown
Power and Runtime Expectations
  • Battery direction: compact communicator/tablet-style Li-ion/LiPo pouch pack.
  • Recommended chemistry is now 1S Li-ion/LiPo for thin mechanical packaging, with high-current boost conversion to the 5 V system rail.
  • Confirmed battery pack: 1S2P using 2x BatterySpace PL-5467100-2C cells with Tenergy 32190 PCM, 8500 mAh / ~31.5 Wh nominal.
  • Use USB-C PD charging with a 1S switching charger/power-path, I2C fuel gauge, NTC monitoring, and run-while-charging support.
  • Include fuel gauge, pack protection, power button/soft-shutdown, and low-battery cutoff.
Preliminary Power Tree and Power Budget
Detailed preliminary assumptions are tracked in the separate Power Budget file.
High-level rails:

Table


RailLoads
Main battery / USB-C PD inputCharger, power path, system regulators
5 V systemRK3588 SOM/SBC input, USB-A VBUS, display/keyboard if 5 V, USB hub
3.8 V LTESIM7600G-H-M.2 burst supply
3.3 V logicRP2040-LoRa, level shifters, control, low-speed peripherals
Audio railSpeaker amplifier, if not powered from 5 V
Backlight/display railTBD after display documentation
Manufacturing and Assembly Expectations
  • If using SOM/SBC: custom carrier board likely 6 layers minimum due USB 3.0, HDMI, LTE USB, RF, and power integrity.
  • If raw RK3588S2 + LPDDR4x is chosen: expect 8+ layer HDI/microvia design, controlled impedance, DDR simulation/validation, and substantially higher cost/risk.
  • RF antennas and M.2 connector placement must be considered with the enclosure, display metalwork, and battery location.
Firmware-Relevant Hardware Requirements
  • Linux BSP support depends on selected RK3588S2/SOM/SBC vendor.
  • Need serial console/debug access.
  • LTE should be exposed to Linux as USB modem interface; support ModemManager/NetworkManager where possible.
  • RP2040-LoRa requires firmware update/programming path.
  • Keyboard/display drivers depend on the actual interface of the screen/keyboard assembly.
Physical Design Expectations
  • Keyboard assembly likely dominates product size; candidate AKP846 dimensions found around 371 x 219 x 21 mm.
  • Need exact enclosure size, mounting hole locations, connector exits, battery location, antenna locations, speaker port, cooling path, and SIM access.
  • RK3588-class SoC needs heat spreader or conduction path.
Important Design Decisions
  1. Use SOM/SBC for compute rather than raw RK3588S2 + LPDDR4x for the first prototype.
  2. Treat SIM7600G-H-M.2 as a high-burst-current RF module requiring a dedicated 3.8 V-class supply and RF-aware layout.
  3. Treat the RP2040-LoRa board as a daughterboard unless the user wants to integrate the LoRa circuit directly.
  4. Do not design display/keyboard connector circuitry until the exact interface is documented.
  5. Use at least a 6-layer carrier PCB for the high-speed/RF carrier approach.
Assumptions
  • Prototype-first design, not immediate production certification.
  • Linux runs on a purchased RK3588S2/RK3588-class module/SBC.
  • Cellular modem is USB-connected.
  • LoRa board can be connected as a daughterboard.
  • Screen/keyboard assembly is used as a purchased module rather than reverse-engineered internally.
  • Battery is rechargeable Li-ion/LiPo with charging from USB-C.
Open Decisions / Questions for User
  1. Keyboard final layout drawing: 60-key legend, Fn map, tact/keycap part selection.
  2. Enclosure CAD kickoff: hinge, SMA bulkhead locations, antenna keepouts, service hatch.
  3. RJ45 Ethernet is omitted.
  4. Should the custom keyboard enumerate as USB HID, I2C, or both?
  5. What keyboard switch/key technology and approximate size should be used?
  6. USB-C role is confirmed as PD sink/UFP charge plus USB 2.0 data, not USB 3.0 and not full dual-role/source.
  7. Is HDMI for external output only, or should the internal DSI display and external HDMI work simultaneously?
  8. Which LoRa frequency band is required: 433/470, 868, or 915 MHz?
  9. Do you want internal antennas or external SMA connectors for LTE/GNSS/LoRa?
  10. What speaker impedance/power target and enclosure size/shape should be used?
Change Notes
  • Initial specification created from user requirements.
  • Project renamed to Linux Cyberdeck.
  • Architecture risk review added: raw RK3588S2 + LPDDR4x is not recommended for the first prototype.
  • Updated per user direction: switched from RK3588-class SOM carrier to Raspberry Pi Compute Module 5 carrier using attached CM5 datasheet, retaining tablet-style battery, M5Stack CardKB as keyboard size/interface reference, custom keyboard PCB, and Waveshare 6.25inch DSI LCD (B) display candidate.
  • Updated per user direction: selected DigiKey SC1598 / CM5108000 CM5 Lite wireless 8 GB module, USB-C charging+data, microSD instead of NVMe, and direct-wired custom keyboard via onboard keyboard MCU.
  • Updated per confirmed decisions attachment: USB-C data is USB 2.0 gadget/rpiboot, battery is 1S2P 8500 mAh verified pack, keyboard is split RP2040/QMK PCB, and only keyboard layout plus enclosure CAD kickoff remain open.
  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Compute

  • Cellular / GNSS

  • LoRa

  • Display

  • Keyboard

  • USB

  • HDMI

  • Audio

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Preliminary Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions

  • Open Decisions / Questions for User

  • Change Notes