ATtiny212 Firmware for Distortion Pedal


Thought for 12 mins 57 sec
Awaiting 1 background task
Received notification from "PCB Placement Audit" that it finished — picking the work back up.
Received notification from "PCB Mechanical Audit" that it finished — picking the work back up.
Both independent audits are complete. I’m reconciling their findings with the current DRC and geometry, then I’ll publish the consolidated read-only report.
Created a project doc

PCB Placement and Mechanical Clearance Audit

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PCB Placement and Mechanical Clearance Audit Scope and method
Read-only review of the current 100 mm × 60 mm, 1.30 mm, four-layer PCB. The audit reconciles current placement geometry, footprint/model nodes, routing state, placement-related DRC, and two independent reviews. No schematic, PCB, rule, route, footprint, model, or enclosure changes were made.
Executive conclusion
The board is electrically routed and the built-in placement DRC is currently clean, but it is not yet mechanically release-ready. The primary blocker is unreliable 3D/body geometry: several component models are visibly displaced or wrongly oriented, and the two enclosure models are separated from the PCB in Z rather than forming a mated assembly. This prevents trustworthy automated collision validation.
Completed the full read-only placement and mechanical audit. Current DRC is clean and routing has 0 airwires, but mechanical release is blocked by unmated enclosure models and unreliable component geometry—particularly S1, U3, R13/R14, and panel-mounted controls/connectors.
Next priorities
  1. Re-seat the enclosure body and lid at the PCB datum.
  2. Correct suspect 3D model transforms.
  3. Revalidate switch, jack, potentiometer, LED, and programming-header envelopes.
  4. Run the placement/clearance audit again before manufacturing.

VR2
Not Recommended for New Designs
U5
VR1
Not Recommended for New Designs
U6
CN2
H1
K1
CN1
U3
Manufacturer Part Number
AQY212GSZ
VR3
+5V
R14
+5V
U2
+9V_CLEAN
+9V_CLEAN
+9V_CLEAN
+9V_PROT
+9V_CLEAN
+5V
+9V_PROT
+5V
R13
+9V_CLEAN
+9V_RAW
+9V_CLEAN
C15
Capacitance
220pF
EFFECT_OUT
JACK_OUT_TIP
S1
EFFECT_IN
U3A
TONE_WIPER
REC_FB
GAIN_INV
BUFFER_OUT
RELAY_COIL_NEG
TONE_IN
U3A
EFFECT_IN
BYPASS_LINK
VREF
GAIN_INV
VREF
GAIN_FB
PA1
VREF
JACK_IN_TIP
PA0/UPDI
PA0/UPDI
JACK_IN_TIP
BYPASS_LINK
VREF
DRIVE_OUT
EFFECT_OUT
BUFFER_OUT
TONE_WIPER
GAIN_INV
EFFECT_IN
PA1
EFFECT_OUT
DRIVE_OUT
JACK_IN_TIP
RELAY_COIL_NEG
VREF1
VREF1
VREF1
VREF
EFFECT_OUT
GAIN_FB
VREF
GAIN_INV
DRIVE_OUT
JACK_OUT_TIP
R4
Resistance
2.2kΩ
C24
R35
C1
Capacitance
10uF
H4
R1
Resistance
22R Ω
D4
C8
R10
Resistance
47kΩ
C10
C13
R2
Resistance
2.2kΩ
D3
C20
Capacitance
100nF
C22
Capacitance
100nF
H2
H5
H3
R16
R9
Resistance
47kΩ
R17
Resistance
100 Ω
R25
Resistance
1kΩ
R7
Resistance
1MΩ
J1
C23
R8
Resistance
1MΩ
R23
Q1
C2
D2
C14
Capacitance
0.1uF
C5
Capacitance
1uF
LED1
R19
Resistance
10kΩ
R18
Resistance
100kΩ
R12
Resistance
1MΩ
R5
Resistance
100kΩ
C4
Capacitance
100nF
R11
Resistance
1kΩ
R20
Resistance
10kΩ
R6
Resistance
1MΩ
R21
Resistance
100 Ω
D1
Manufacturer Part Number
333-2SYGD
C18
Capacitance
0.1µF
C16
C17
U1
R22
Resistance
47 Ω
C6
Capacitance
2.2uF
C9
Flux Logo1
Width Size
19.05mm / 0.75in
C21
Designator Prefix
C
C7
C25
Q2
C3
Capacitance
47uF
C19
Capacitance
22uF
C12
Relay Distortion Path Debug Analysis
Executive summary
The relay coil/driver and flyback diode orientation in the schematic are logically correct now: D2 cathode is on +5V, D2 anode is on RELAY_COIL_NEG, Q2 collector is on RELAY_COIL_NEG, and Q2 emitter is on ground.
The most important schematic issue I found is the relay contact mapping: the Flux symbol for K2 labels COM1 as pin 3 and NC1 as pin 4, but the Omron G6S-2F datasheet pinout shows COM pins are 4 and 9, NC pins are 3 and 10, and NO pins are 5 and 8 for the SMD G6S-2F top view. That means the schematic symbol/footprint pin-function mapping is likely wrong or mirrored for at least the COM/NC contacts. This can absolutely produce the symptom: relay clicks, but the effect path is not actually routed where the schematic appears to say it is.
A second likely issue is the anti-pop photorelay U4: it is wired from EFFECT_OUT to GND, so if PA6 drives U4 on during normal effect operation, it will short/mute the effect output.
1. Relay K2 routing truth table
Datasheet pin mapping for Omron G6S-2F
For Omron G6S-2F-DC5 / G6S-2F-Y-DC5, the contact pinout found from the Omron datasheet/web result is:

Table


Relay functionPhysical pins
Coil1 and 12
COM4 and 9
NC3 and 10
NO5 and 8
Important: Omron shows the G6S-2F SMD terminal arrangement as top view. The through-hole version uses a bottom-view drawing. If a footprint/symbol was created from the wrong view, the contact functions can be mirrored/swapped.
K2 symbol pin mapping currently in Flux schematic
The K2 schematic symbol currently exposes these pins:

Table


Flux K2 pin namePin number in symbol
1 +1
12 -12
COM13
NCl14
NO15
NO28
NCl29
COM210
This conflicts with the Omron datasheet mapping above:
  • Flux says COM1 = 3, but datasheet says pin 3 is NC.
  • Flux says NCl1 = 4, but datasheet says pin 4 is COM.
  • Flux says NCl2 = 9, but datasheet says pin 9 is COM.
  • Flux says COM2 = 10, but datasheet says pin 10 is NC.
  • NO pins 5 and 8 appear correct.
Intended logical routing from the schematic labels
Based on the schematic labels and adjacent bias resistors, the intended audio relay routing appears to be:

Table


Logical netEvidence in schematic
JACK_IN_TIPtied to K2 pole 1 common side with R6 1M pulldown
EFFECT_INtied to K2 pole 1 NO side, R11 input resistor, R7 1M pulldown
BYPASS_LINKtied to both NC contacts
EFFECT_OUTtied to K2 pole 2 NO side, R21 series/output path, U4 mute, R8 1M pulldown
JACK_OUT_TIPtied to K2 pole 2 common side
If the relay symbol were correct, the desired truth table would be:

Table


Relay statePole 1 connectionPole 2 connectionResult
OFF / de-energizedJACK_IN_TIPBYPASS_LINKJACK_OUT_TIPBYPASS_LINKBypass path active
ON / energizedJACK_IN_TIPEFFECT_INJACK_OUT_TIPEFFECT_OUTDistortion path active
Actual physical behavior if the footprint follows the Omron datasheet
Because the schematic symbol appears to assign COM/NC incorrectly, the physical relay may behave differently from the schematic view.
Using the Omron physical mapping:
  • Pin 3 is actually NC, not COM.
  • Pin 4 is actually COM, not NC.
  • Pin 9 is actually COM, not NC.
  • Pin 10 is actually NC, not COM.
That means a board built from this footprint could have the physical commons on the nets intended to be NC/bypass, while the nets intended to be commons are actually NC terminals. The NO contacts may still go to the effect input/output, but the relay common may not be on JACK_IN_TIP / JACK_OUT_TIP. This is the top suspect for “relay clicks but no effect signal.”
Answer to the requested relay questions
  • Relay OFF expected: JACK_IN_TIP connects to BYPASS_LINK; JACK_OUT_TIP connects to BYPASS_LINK.
  • Relay ON expected: JACK_IN_TIP connects to EFFECT_IN; EFFECT_OUT connects to JACK_OUT_TIP.
  • Is COM/NC/NO mapping correct? The current Flux K2 symbol mapping does not match the Omron G6S-2F pinout found from the datasheet/web result. NO pins look correct; COM/NC pins appear swapped.
  • Could the footprint be mirrored or using bottom-view numbering incorrectly? Yes. The G6S-2F SMD datasheet diagram is top view; using a bottom-view interpretation can mirror/swap contact functions. Also, the symbol itself already appears inconsistent with the datasheet pin functions.
2. D2 flyback diode orientation
Schematic connections:
  • D2 cathode K+5V
  • D2 anode ARELAY_COIL_NEG
  • K2 coil positive pin 1 → +5V
  • K2 coil negative pin 12 → RELAY_COIL_NEG
  • Q2 collector → RELAY_COIL_NEG
This is the correct flyback orientation for a low-side relay driver.
Correct installed orientation:
  • D2 stripe/cathode side: +5V / relay coil positive
  • D2 anode side: RELAY_COIL_NEG / Q2 collector / relay coil negative
If D2 is reversed, it becomes forward-biased whenever Q2 turns on, effectively shorting +5V through D2 and Q2 to ground. Symptoms can include regulator collapse, high current, Q2 overheating, diode damage, or the relay not energizing properly. Temporarily removing D2 allows the relay to click, but it removes inductive kick protection and can stress Q2/U2 over time.
3. Q2 relay driver verification
Schematic connections match the expected low-side NPN driver:
  • U2 PA1 → R4 4.7k → Q2 base
  • R5 100k pulls Q2 base to GND
  • Q2 emitter → GND / DGND
  • Q2 collector → RELAY_COIL_NEG
  • Relay coil positive → +5V
Expected voltages when relay is ON:

Table


NodeExpected voltage
U2 PA1about 5 V
Q2 baseabout 0.6–0.8 V
Q2 emitter0 V
Q2 collector / RELAY_COIL_NEGabout 0–0.3/0.6 V
Across relay coilabout 4.5–5 V
This part of the schematic is consistent with the relay clicking.
4. U4 photorelay / mute analysis
U4 is a Toshiba TLP3431 photorelay. In this schematic it is wired as an output mute:
  • U4 input LED anode A is driven from PA6 through R3 1.2k.
  • U4 input cathode C goes to GND.
  • U4 output terminals are between EFFECT_OUT and GND.
Therefore:
  • PA6 HIGH → current flows through R3 and U4 input LED → photorelay output turns ON → EFFECT_OUT is shorted/muted to GND.
  • PA6 LOW → U4 input LED off → photorelay output open → EFFECT_OUT is not muted.
Answers:
  • Is U4 intended as anti-pop mute? Yes, based on its placement from EFFECT_OUT to ground.
  • Should U4 be ON only briefly during relay switching? Yes. It should normally be ON only around the switching transient, then released.
  • Should U4 be OFF during normal effect ON operation? Yes. During normal audio operation, U4 must be OFF or it can mute the output.
  • If PA6 keeps U4 ON, could it completely mute the distortion output? Yes. It directly shunts EFFECT_OUT to GND.
  • What should PA6 logic be?
    • Bypass steady state: normally LOW unless you intentionally mute during switching.
    • Switching interval: HIGH briefly to mute EFFECT_OUT during relay transition.
    • Effect ON steady state: LOW.
A quick test is to force PA6 LOW or temporarily disconnect U4/R3 and check whether the effect path returns.
5. VREF and analog power verification
Analog power
The op-amp supply net appears correct:
  • +9V_CLEAN corresponds to the schematic net containing U5 V+, U6 V+, C3/C8/C9/C10/C11 decoupling, and R9 top of VREF divider.
  • U5 V- and U6 V- are connected to GND.
Expected measurement:
  • U5 pin 8 / U6 pin 8 to GND: about +9 V, depending on adapter/battery and protection drop.
  • U5 pin 4 / U6 pin 4 to GND: 0 V.
VREF generation
VREF is generated by R9/R10:
  • R9 47k from +9V_CLEAN to VREF
  • R10 47k from VREF to GND
Expected VREF:
  • VREF ≈ +9V_CLEAN / 2
  • With 9.0 V clean supply: about 4.5 V.
  • With diode/MOSFET/protection losses and battery variation: roughly 4–4.5 V is normal.
VREF has decoupling/filtering around the analog section; if VREF is missing or near 0 V/9 V, the op-amps will bias incorrectly and the effect path can be silent or badly distorted.
Grounding
The schematic uses portals named DGND, but the actual power portal appears to tie into the global GND net. Analog and digital grounds appear connected as one net, which is acceptable for this single-supply pedal if layout return currents are handled carefully.
6. Distortion signal path review
The intended signal flow appears to be:
  1. JACK_IN_TIP
  2. Relay K2 pole 1, energized state
  3. EFFECT_IN
  4. R11/C14 into U5 buffer/input network
  5. BUFFER_OUT
  6. Gain/clipping stage around U6A with D3/D4
  7. DRIVE_OUT
  8. Tone network / tone pot terminals
  9. Volume/output network / volume pot terminals
  10. EFFECT_OUT
  11. Relay K2 pole 2, energized state
  12. JACK_OUT_TIP
Potential schematic problems found:
  • Relay COM/NC pin mapping is likely wrong relative to Omron’s actual G6S-2F pinout. This is the main suspect.
  • U4 can mute EFFECT_OUT if PA6 is HIGH during normal effect operation.
  • ERC reports Net 31 is a single-pin net at R21:P2. Because R21 appears to be the output series resistor from EFFECT_OUT, a single-pin net on R21:P2 is suspicious. It may mean the final output side of the volume/effect output path is not actually connected to where intended.
  • ERC reports Net 32 is a single-pin net at C20:2. This may be part of the output coupling/volume network; if one side of a coupling capacitor is left floating, the signal path can be open.
  • ERC reports floating GAIN_FB portals. This may be a portal/label artifact, but gain-stage feedback should be checked carefully.
7. Potentiometer checks
The potentiometers are represented as separate terminal components, so the schematic relies on correct external wiring/pin numbering. Verify the physical pot wiring against the intended nets:
  • Gain pot: terminals associated with gain feedback/inverting node must form a feedback/control path, not leave the op-amp feedback open.
  • Tone pot: wiper must connect to TONE_WIPER; tone network endpoints should not short signal permanently to ground unless at an extreme setting.
  • Volume pot: the output/wiper must actually reach EFFECT_OUT through the intended coupling/series resistor path.
The single-pin ERC warnings at R21:P2 and C20:2 strongly suggest checking the volume/output section first.
8. Clipping diodes D3/D4
D3 and D4 are connected anti-parallel between the gain-stage nodes:
  • One side group: D3:1, D4:2, R14:P2, C16:2, C17:1, U6:OUTA
  • Other side group: D3:2, D4:1, R13:P2, C16:1, U6:-INA
That is consistent with symmetrical clipping in the op-amp feedback/gain stage. They do not appear to be accidentally shorting directly to ground. They are unlikely to be the primary cause of total silence unless one diode is physically shorted or the surrounding gain feedback path is open.
9. Measurement checklist
Perform these with the pedal on the bench, using circuit ground as the black probe reference unless stated otherwise.
Power off / continuity checks
  1. Relay contact truth table at K2 pins directly
    • Relay OFF:
      • Pin 3 ↔ pin 4 or pin 4 ↔ pin 3? Determine which physical pins are closed.
      • Pin 9 ↔ pin 10 or pin 10 ↔ pin 9? Determine which physical pins are closed.
    • Relay ON:
      • Pin 4 ↔ pin 5 should close if Omron datasheet mapping is correct.
      • Pin 9 ↔ pin 8 should close if Omron datasheet mapping is correct.
  2. Expected bypass continuity, relay OFF
    • JACK_IN_TIPBYPASS_LINK: should be near 0 Ω.
    • JACK_OUT_TIPBYPASS_LINK: should be near 0 Ω.
    • JACK_IN_TIPEFFECT_IN: should be open.
    • JACK_OUT_TIPEFFECT_OUT: should be open.
  3. Expected effect continuity, relay ON
    • JACK_IN_TIPEFFECT_IN: should be near 0 Ω.
    • JACK_OUT_TIPEFFECT_OUT: should be near 0 Ω, possibly through R21 depending where you probe.
    • BYPASS_LINK should be disconnected from the active audio path.
  4. D2 diode orientation
    • Stripe/cathode pad continuity to +5V.
    • Non-stripe/anode pad continuity to RELAY_COIL_NEG / Q2 collector / K2 pin 12.
  5. EFFECT_OUT to GND resistance, power off
    • With U4 off/unpowered, EFFECT_OUT should not be a hard short to ground.
    • If it reads near 0 Ω, suspect U4 stuck on/shorted, solder bridge, or wrong net connection.
  6. Check R21 and C20 suspicious open nodes
    • R21:P2 should connect to the intended next node/output path, not be isolated.
    • C20:2 should connect to the intended output/volume network, not be isolated.
Power on / DC voltage checks
  1. +9V_CLEAN to GND
    • Expect roughly the adapter/battery voltage after protection, typically near 9 V.
  2. +5V to GND
    • Expect about 5.0 V.
  3. VREF to GND
    • Expect about half of +9V_CLEAN, typically 4–4.5 V.
  4. Op-amp supplies
  • U5/U6 V+ to GND: +9V_CLEAN.
  • U5/U6 V- to GND: 0 V.
  1. Relay driver ON state
  • PA1: about 5 V.
  • Q2 base: about 0.6–0.8 V.
  • Q2 collector / RELAY_COIL_NEG: about 0–0.6 V.
  • K2 coil pin 1 to pin 12: about 4.5–5 V.
  1. U4 mute / PA6
  • During normal effect ON steady state, PA6 should be LOW.
  • If PA6 is HIGH, U4 is probably muting EFFECT_OUT.
  • Measure EFFECT_OUT DC: it should usually sit around VREF through biasing/output network, not hard 0 V, unless AC-coupled after the final cap.
Audio probe checks
  1. Inject a small guitar/sine signal and probe in order:
  • EFFECT_IN
  • U5 buffer output / BUFFER_OUT
  • U6 gain-stage output / DRIVE_OUT
  • tone output / TONE_WIPER
  • volume output / EFFECT_OUT
  • JACK_OUT_TIP with relay ON
The first point where signal disappears identifies the failing block.
10. Likely fault list
Most likely causes, in priority order:
  1. K2 symbol/footprint COM/NC mapping mismatch with the Omron G6S-2F datasheet. This is the strongest schematic-level suspect.
  2. Relay footprint mirrored or interpreted from the wrong view. G6S-2F SMD drawing is top view; bottom-view interpretation can swap physical connectivity.
  3. U4 photorelay mute held ON by PA6, shorting EFFECT_OUT to ground during normal effect mode.
  4. Output path open near R21 or C20, supported by ERC single-pin-net warnings on R21:P2 and C20:2.
  5. Volume pot wiring/wiper not connected to EFFECT_OUT, especially because the pot terminals are generic terminals and depend on physical harness/pin numbering.
  6. VREF missing or wrong, which would bias the op-amps incorrectly.
  7. +9V_CLEAN missing at U5/U6, leaving the analog stages unpowered.
  8. Gain feedback path open or mislabeled, suggested by floating GAIN_FB ERC warnings.
  9. D2 reinstalled reversed, which would short the relay supply when Q2 turns on; however, with D2 removed and K2 clicking, this is not the current cause of no distortion sound.
  10. Physical solder/assembly issue on K2, U4, pots, or output coupling components.
Before changing firmware, verify K2 physical relay contact continuity with a meter directly at the relay pins. If the physical relay follows the Omron pinout, update/fix the K2 part symbol/footprint mapping so pins 4 and 9 are COM, pins 3 and 10 are NC, and pins 5 and 8 are NO. Also force PA6 LOW during steady-state effect ON or temporarily disable U4 to confirm it is not muting EFFECT_OUT.

  • Executive summary

  • 1. Relay K2 routing truth table

  • Datasheet pin mapping for Omron G6S-2F

  • K2 symbol pin mapping currently in Flux schematic

  • Intended logical routing from the schematic labels

  • Actual physical behavior if the footprint follows the Omron datasheet

  • Answer to the requested relay questions

  • 2. D2 flyback diode orientation

  • 3. Q2 relay driver verification

  • 4. U4 photorelay / mute analysis

  • 5. VREF and analog power verification

  • Analog power

  • VREF generation

  • Grounding

  • 6. Distortion signal path review

  • 7. Potentiometer checks

  • 8. Clipping diodes D3/D4

  • 9. Measurement checklist

  • Power off / continuity checks

  • Power on / DC voltage checks

  • Audio probe checks

  • 10. Likely fault list

  • Recommended next action