CERILUME LED Controller PCB Design
firmware-starter project file.LED_DATA_5V, pin 2 GND.5V_LOGIC, GND, LCD_SDA, LCD_SCL.Table
| Rail | Source | Expected Voltage | Measure At | Pass Criteria |
|---|---|---|---|---|
5V_LOGIC | U1 VBUS from Nano USB-C power | 5.0 V nominal | TP1 / J3 5V | 4.75–5.25 V with USB adapter connected. |
3V3_LOGIC | U1 +3V3 regulator output | 3.3 V nominal | TP2 / U3 VREF1 | 3.14–3.47 V. |
GND | U1 GND_1/GND_2 | 0 V reference | TP3 / J3 GND | Continuity to all connector ground pins. |
PCA9306_EN_VREF2 | R6 200 kΩ pull-up to 5V_LOGIC | about 3.9 V regulated node | U3 EN/VREF2 | Enabled; do not short directly to 5 V. |
5V_LOGIC to GND and 3V3_LOGIC to GND; there should be no short.Table
| Signal | Net | Expected State | Measure At | Notes |
|---|---|---|---|---|
| LED input | LED_DATA_3V3 | 0–3.3 V logic waveform | U2 pin 1A / U1 D7 | Generated by firmware on D7. |
| LED output | LED_DATA_5V | 0–5 V logic waveform | TP4 / J1 pin 1 | After U2 and R1 330 Ω. |
| Microphone input | MIC_SIGNAL | 0–3.3 V analog | TP5 / U1 A0 | Never exceed 3.3 V. |
| I2C low-side SDA/SCL | I2C_SDA, I2C_SCL | 0–3.3 V open-drain I2C | U1 A4/A5 or U3 SDA1/SCL1 | Must not be pulled to 5 V. |
| LCD I2C high-side SDA/SCL | LCD_SDA, LCD_SCL | 0–5 V open-drain I2C | J3 SDA/SCL | Expected LCD address 0x27. |
Table
| Connector | Pinout | Test Method |
|---|---|---|
| J1 LED data | Pin 1 LED_DATA_5V, pin 2 GND | Continuity to TP4 and TP3; verify no 5 V power pin exists. |
| J2 microphone | Pin 1 3V3_LOGIC, pin 2 MIC_SIGNAL, pin 3 GND | Measure 3.3 V between pins 1 and 3; verify pin 2 continuity to TP5/A0. |
| J3 LCD I2C | Pin 1 5V_LOGIC, pin 2 GND, pin 3 LCD_SDA, pin 4 LCD_SCL | Verify 5 V power, common ground, and I2C activity through U3 PCA9306. |
firmware-starter project file.Table
| Test | Input | Expected Output | Pass Criteria |
|---|---|---|---|
| LED data level shift | Firmware drives D7 | TP4 shows 5 V logic waveform | Logic high near 5V_LOGIC; logic low near GND. |
| Microphone ADC | 0–3.3 V signal on J2 pin 2 | Serial ADC reading changes | Reading remains within 0–4095 and follows input. |
| LCD I2C level shift | Firmware initializes LCD at 0x27 | LCD shows CERILUME startup text | A4/A5 side remains 3.3 V, J3 side uses 5 V I2C levels. |
| Ground sharing | External LED PSU ground tied to J1 pin 2 | Common reference for data | LED data works only when external LED supply ground is common with board GND. |
Table
| Section | Result | Notes |
|---|---|---|
| Visual Inspection | [ ] Pass / [ ] Fail | |
| Power Rails | [ ] Pass / [ ] Fail | |
| Connectors | [ ] Pass / [ ] Fail | |
| Programming | [ ] Pass / [ ] Fail | |
| Functional Validation | [ ] Pass / [ ] Fail |
Prerequisites
1. Visual Inspection
2. Power Rail Verification
3. Critical Signal Verification
4. Connector Tests
5. Programming
6. Functional Validation
Pass/Fail Summary