Understanding Circuit Schematic

1:53

Accessing knowledge base.

Great question. The DC-to-AC conversion happens at the MOSFET switching stage. Here’s the exact path and “where” the waveform turns into AC, tied to parts and nets in your schematic.
What creates the AC
  • The PWM controller U1 oscillates at a frequency set by R1 and C7, producing two alternating drive signals on its outputs (Nets 7 and 11).
  • Those two signals go into the gate driver U2, which strengthens them and sends them through gate resistors R5 and R6 to the MOSFET gates Q1 and Q2. Zeners D7 and D5 clamp VGS to keep the gates within safe limits.
  • As Q1 and Q2 turn on alternately, their drain nodes (Net 8 and Net 9) swing between near-12 V and near-0 V in opposite phases.
  • That pair of opposite-phase switch nodes creates an alternating voltage across the primary winding. This is the exact “DC to high-frequency AC” conversion point: the AC exists across the primary because the ends are being yanked up/down alternately by the two drains (Net 8 and Net 9).
Then AC goes back to DC
  • The secondary’s alternating voltage is rectified by the fast diodes D1, D2, D3, and D4.
  • The pulsating DC is smoothed by the output inductor L1 and capacitor C10, yielding a steady high-voltage DC at the output.
Probe/mental model (if you visualize or measure)
  • U1 outputs (Nets 7, 11): clean logic-like PWM.
  • MOSFET gates (after R5/R6): strong PWM drive, clamped by D7/D5 so VGS stays safe.
  • MOSFET drains (Net 8, Net 9): large, opposite-phase square-like waveforms. The alternating voltage across these two nodes is the high-frequency “AC”.
  • Rectifier inputs (D1D4): high-frequency pulses.
  • Output after L1/C10: smoothed DC.
If you want, I can mark these exact nodes in your schematic (gates, drains, rectifier inputs) and label “here is where it becomes AC,” then “here it becomes DC again.”
Add test points
Label AC nodes
Snubber recommendation
Calculate RMS voltage
EMI filter selection
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