Access Reader Design
Worked for 1 min 27 sec
Текущий 80×100 мм layout всё ещё физически перегружен и даже однослойный targeted router блокируется; для order-ready в пределах вашего лимита увеличиваю плату до 120×100 мм и повторяю edge-placement/stackup.
Thought for 12 sec
В этом запуске я успел перечитать live layout/DRC/stackup: плата сейчас 80×100 мм, сильно перегружена, часть компонентов/отверстий выходит за габарит, DRC всё ещё показывает сотни airwires, а stackup readback остаётся некорректным — фактически внутренние GND/PWR слои не подтверждены как рабочие.
Что осталось сделать:
- Пополнить ACUs — сейчас AI-функции недоступны, поэтому я не могу продолжать tool execution.
- Увеличить плату до 120×100 мм в пределах вашего лимита.
- Повторить placement: все разъёмы/клеммники на кромки наружу, 4 отверстия Ø3.2 по углам, antenna keepout у края.
- Исправить/подтвердить stackup Top / Inner1 GND / Inner2 PWR / Bottom.
- Завершить routing, убрать все airwires, пройти DRC.
- Только после чистого DRC экспортировать order-ready Gerber+drill, BOM с DNP-колонками и Pick-and-Place.
Текущий пакет не order-ready.
Продолжить после ACUs
Чеклист DRC проблем
Проверить DNP BOM
Проверить разъёмы
Сохранить требования
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Preliminary Power Budget - Access Reader
Status
Updated 2026-07-09 for full Rev A prototype: PoE, DC buck, W5500/RJ45 and Wi-Fi are all populated on one board. Live schematic/BOM inspection was unavailable in this run, so values remain pre-export engineering estimates pending datasheet verification.
Power Architecture
Diagram
Non-Negotiable Power Rule
5V_POE_PRE_ORand5V_DC_PRE_ORare independent regulated outputs and must never be shorted directly together.- Merge them only through reverse-blocking ideal-diode OR-ing or a priority power mux.
- Output net is
5V_SYS; downstream loads must fit within either source alone unless firmware explicitly limits power. - If both sources are present, the selected mux priority or the higher 5 V source supplies the load; no current sharing is assumed.
Load Estimate by Rail
Table
| Rail | Load | Typical | Peak | Prototype population |
|---|---|---|---|---|
| 3.3 V | ESP32-S3 Wi-Fi active | 120 mA | 500 mA | Populated |
| 3.3 V | CLRC663 field active | 100 mA | 250 mA | Populated |
| 3.3 V | GM861 QR scanner logic/control | 70 mA | 130 mA | Populated |
| 3.3 V | W5500 Ethernet | 120 mA | 180 mA | Populated |
| 3.3 V | RS-485, RTC, logic, pullups | 20 mA | 55 mA | Populated |
| 5 V | EM4095 LF channel | 50 mA | 100 mA | Populated |
| 5 V | Two relay coils | 0 mA | 145 mA | Populated |
| 5 V | WS2812B/status LEDs + buzzer | 30 mA | 150 mA | Populated |
Rail Sums
Table
| Scenario | 3.3 V peak | Direct 5 V peak | Reflected 3.3 V load into 5 V at 90 percent buck efficiency | Estimated total 5 V peak |
|---|---|---|---|---|
| Full prototype, Wi-Fi + Ethernet available | 1135 mA | 395 mA | 832 mA | 1227 mA |
| Conservative Rev A sizing target | 1500 mA | 500 mA | 1100 mA | 1600 mA |
Input Power Estimate
Table
| Source | Assumption | Peak input estimate |
|---|---|---|
| 9 V DC input | 5 V at 1.6 A, 88 percent buck efficiency | about 1.0 A |
| 32 V DC input | 5 V at 1.6 A, 88 percent buck efficiency | about 0.28 A |
| PoE 802.3af via AG9905-MTB | 5 V at 1.6 A plus module losses | about 9 to 10 W at PD input |
OR-ing / Power-Mux Design Checklist
- Use a device/topology with guaranteed reverse-current blocking on both source paths.
- Rate continuous current for at least the conservative 1.6 A
5V_SYStarget, with thermal margin. - Place source-side capacitors before OR-ing and common bulk capacitance after OR-ing.
- Add test points:
5V_POE_PRE_OR,5V_DC_PRE_OR,5V_SYS,3V3_SYS, GND. - Decide and document behavior when both inputs are present: higher-source-wins or explicit priority.
- Audit hidden backfeed paths through USB, Ethernet shield, GPIO protection diodes, Wiegand/RS-485, LEDs and external connectors.
Current Conclusion
- Full prototype population is feasible with safe 5 V OR-ing; direct paralleling is not acceptable.
- Size
5V_SYSfor at least 1.5 A, preferably 1.6-2 A margin where thermals allow. - Keep the 3.3 V regulator in the 2 A class.
- Treat PoE as IEEE 802.3af class 3 until measured; if measured peak exceeds margin, implement firmware power limiting of RF/QR/LED/relays.
Items Requiring Datasheet Verification
- AG9905-MTB output current, output capacitor limit, isolation/clearance and startup behavior.
- LMR16020 inductor, diode, feedback, compensation/soft-start and thermal limits over 9-32 V.
- OR-ing/power-mux reverse blocking, priority behavior, current limit and thermal dissipation.
- GM861 peak current with illumination and operating mode.
- Relay coil current at worst-case temperature.
- CLRC663 and EM4095 antenna-drive current at target tuning.
- W5500 current with selected MagJack and link conditions.
Status
Power Architecture
Non-Negotiable Power Rule
Load Estimate by Rail
Rail Sums
Input Power Estimate
OR-ing / Power-Mux Design Checklist
Current Conclusion
Items Requiring Datasheet Verification
