Access Reader Design
Worked for 1 min 27 sec
Текущий 80×100 мм layout всё ещё физически перегружен и даже однослойный targeted router блокируется; для order-ready в пределах вашего лимита увеличиваю плату до 120×100 мм и повторяю edge-placement/stackup.
Thought for 12 sec
В этом запуске я успел перечитать live layout/DRC/stackup: плата сейчас 80×100 мм, сильно перегружена, часть компонентов/отверстий выходит за габарит, DRC всё ещё показывает сотни airwires, а stackup readback остаётся некорректным — фактически внутренние GND/PWR слои не подтверждены как рабочие.
Что осталось сделать:
- Пополнить ACUs — сейчас AI-функции недоступны, поэтому я не могу продолжать tool execution.
- Увеличить плату до 120×100 мм в пределах вашего лимита.
- Повторить placement: все разъёмы/клеммники на кромки наружу, 4 отверстия Ø3.2 по углам, antenna keepout у края.
- Исправить/подтвердить stackup Top / Inner1 GND / Inner2 PWR / Bottom.
- Завершить routing, убрать все airwires, пройти DRC.
- Только после чистого DRC экспортировать order-ready Gerber+drill, BOM с DNP-колонками и Pick-and-Place.
Текущий пакет не order-ready.
Продолжить после ACUs
Чеклист DRC проблем
Проверить DNP BOM
Проверить разъёмы
Сохранить требования
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Access Reader Full Prototype BOM and Connectivity Gate
Purpose
This file replaces the earlier SKU/DNP thinking for the first prototype. It is a manual BOM/connectivity gate because the live BOM/schematic inspector was unavailable in this run.
Required Nets
Table
| Net | Source / Destination | Notes |
|---|---|---|
VIN_DC_RAW | DC terminal input | 9-32 V input before protection. |
VIN_DC_PROT | After fuse/TVS/reverse/EMI | Feeds LMR16020. |
5V_DC_PRE_OR | LMR16020 output | Must not directly connect to AG9905 output. |
5V_POE_PRE_OR | AG9905-MTB 5 V output | Must not directly connect to LMR16020 output. |
5V_SYS | OR-ing / mux output | Common 5 V rail after reverse blocking. |
3V3_SYS | 3.3 V buck output | Logic/RF/Ethernet rail. |
SPI_SCK, SPI_MOSI, SPI_MISO | ESP32-S3, CLRC663, W5500 | Shared bus; confirm MISO tri-state. |
W5500_CS, W5500_INT, W5500_RST | ESP32-S3 to W5500 | Ethernet is populated in prototype. |
USB_DP, USB_DN | ESP32-S3 native USB | Service/programming. |
Power Branch BOM Gate
Table
| Function | Required Part / Class | Prototype Status |
|---|---|---|
| PoE 5 V | AG9905-MTB | Populate |
| Ethernet/PoE connector | RJ45 MagJack compatible with W5500 and PoE path | Populate |
| DC buck controller/regulator | LMR16020 | Populate |
| DC buck inductor | Datasheet-sized for 5 V rail peak current | Populate |
| DC buck rectifier/diode if required | Datasheet topology-specific | Populate |
| DC buck feedback resistors | Set 5 V output; tolerance suitable for OR-ing | Populate |
| DC input TVS/fuse/reverse protection | Rated for 9-32 V system and expected surges | Populate |
| 5 V source OR-ing | Reverse-blocking ideal diode / priority mux / equivalent FET solution | Populate |
| Post-OR bulk capacitance | Sized for load transients and source startup limits | Populate |
Ethernet/Wi-Fi BOM Gate
Table
| Function | Required Part / Class | Prototype Status |
|---|---|---|
| Wi-Fi/BLE MCU | ESP32-S3-WROOM-1-N16R2 | Populate |
| Ethernet controller | W5500 | Populate |
| Ethernet clock/support | W5500 crystal/oscillator and passives as datasheet requires | Populate |
| Ethernet ESD/termination | Protection and Bob Smith/termination as required by MagJack/reference design | Populate |
| Native USB service | USB connector, CC/ESD if USB-C, or matching USB connector support | Populate |
Full-System Population Gate
Table
| Subsystem | Prototype Status |
|---|---|
| ESP32-S3 boot/reset/native USB/debug | Populate |
| 5 V to 3.3 V regulator | Populate |
| W5500 + RJ45/MagJack Ethernet | Populate |
| AG9905-MTB PoE | Populate |
| LMR16020 9-32 V DC buck | Populate |
| OR-ing / priority power merge | Populate |
| CLRC663 NFC front-end | Populate |
| EM4095 LF front-end | Populate |
| GM861 QR module connector and power switch | Populate |
| RS-485 interface/protection | Populate |
| Wiegand open-drain drivers/protection | Populate |
| Two relay outputs and flyback/suppression | Populate |
| Two opto/digital inputs and tamper | Populate |
| PCF8563 RTC + CR1220 holder | Populate |
| WS2812/status LED and buzzer | Populate |
Manual Connectivity Pass Criteria
- Every populated IC/module has power, ground, decoupling and required support passives.
- No component in PoE/W5500/RJ45 path has
Exclude from BOM,Exclude from PCB,Exclude from Pick & Place, or DNP notes for the first prototype. - Same for LMR16020/DC input path.
- OR-ing/mux device is the only intentional merge between the two 5 V sources.
5V_SYSand3V3_SYShave accessible test points and local bulk capacitance.- External interfaces have protection/termination appropriate to the intended field connection.
Purpose
Required Nets
Power Branch BOM Gate
Ethernet/Wi-Fi BOM Gate
Full-System Population Gate
Manual Connectivity Pass Criteria
