MCP73831 Pin Description

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Looking for "Pin Description for Pin 1" in MCP73831-Family-Data-Sheet-DS20001984H.pdf

Looking for "Pin Description for Pin 2" in MCP73831-Family-Data-Sheet-DS20001984H.pdf

Looking for "Pin Description for Pin 3" in MCP73831-Family-Data-Sheet-DS20001984H.pdf

Looking for "Pin Description for Pin 4" in MCP73831-Family-Data-Sheet-DS20001984H.pdf

Looking for "Pin Description for Pin 5" in MCP73831-Family-Data-Sheet-DS20001984H.pdf

Looking for "5.1.1 Battery Management Input Supply (VDD)" in MCP73831-Family-Data-Sheet-DS20001984H.pdf

Looking for "5.1.2 Current Regulation Set (PROG)" in MCP73831-Family-Data-Sheet-DS20001984H.pdf

Looking for "5.1.3 Battery Charge Control Output (VBAT)" in MCP73831-Family-Data-Sheet-DS20001984H.pdf

Looking for "5.1.4 Charge Status Output (STAT)" in MCP73831-Family-Data-Sheet-DS20001984H.pdf

Looking for "3.6 Exposed Thermal Pad (EP)" in MCP73831-Family-Data-Sheet-DS20001984H.pdf

Here is the pin-out for the MCP73831/2 in the 5-lead SOT-23 package, with each pin’s function, I/O characteristics and key usage notes taken directly from the datasheet (DS20001984H):

Table

Pin No.SymbolI/O TypeDescriptionSpecial Considerations
1STATDigital outputCharge-status indicator:
– MCP73831: tri-state logic output
– MCP73832: open-drain output
Indicates charge cycle states per Table 5-1 (e.g. low during fast charge).• Use with LED + series resistor to VDD for visual status.
• Or add pull-up resistor to interface to a microcontroller.
• High-impedance in shutdown/no-battery.
2VssAnalog ground reference (Input)Device ground. Connect to negative terminal of battery and input supply.• Tie directly to EP (exposed pad).
• Provide a solid ground plane.
• All decoupling and PROG resistor reference this node.
3VBATAnalog outputBattery-charge control output (drain of internal P-channel pass transistor). Drives charging current into the cell.• Connect to battery positive terminal.
• Place a minimum 4.7 µF bypass capacitor from VBAT to Vss for loop stability when battery is disconnected.
• Route VBAT and Vss traces as short as possible to minimize IR drop.
• Pass-transistor on-resistance ≈350 mΩ at VDD=3.75 V, TJ=105 °C.
4VDDAnalog input (supply)Input supply pin. Provides power to the charge controller.• Recommended VDD range: VREG (typ ical) + 0.3 V up to 6 V.
• Bypass to Vss with at least 4.7 µF (datasheet says “4.7 pF,” but typical recommendation is 4.7 µF).
• Device enters power-down when VDD falls below UVLO (VSTOP) to prevent battery drain.
5PROGAnalog/digital inputCurrent-regulation set and charge-enable pin.
A resistor (RPROG) from PROG to Vss programs fast-charge current:
IREG (mA) = 1000 / RPROG (kΩ).                                                                                   | • Typical RPROG range: 2 kΩ–10 kΩ → IREG ≈ 450–550 mA.
• Floating PROG puts device into shutdown (charge disabled).
• PROG can also be used to terminate or restart charge cycles via logic control.
• Device suspends charge if die temperature > 150 °C; resumes ~10 °C below. | | – | EP | Ground/Thermal pad | Exposed thermal pad—electrically tied to Vss. | • Must be soldered to PCB and tied to Vss.
• Add thermal vias from EP land to inner/other copper layers for heat dissipation.
• Improves thermal performance (junction-to-ambient). |
VBAT bypass capacitor
Set PROG resistor
Add STAT indicator
Calculate trace width
Thermal vias EP
261 days
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