MILSPEC Continuity Tester


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38999 Cable Tester
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I stopped PCB work and audited the schematic baseline: it currently contains 95 components, 164 nets, and no open ERC findings as of the latest check. A dedicated executor completed a deeper pin-level audit/correction pass, but I could not retrieve or independently verify its report or applied changes.
Still required
  • Reconcile the executor’s schematic changes.
  • Verify scan coverage, hit capture, MULTIPLE logic, NEXT behavior, display conversion, reset behavior, and unused CMOS inputs.
  • Run a fresh ERC and independent logic review.
  • Keep PCB placement/routing paused until those checks pass.
Execution stopped because your ACUs ran out.
Received notification from "38999 Cable Tester" that it finished — picking the work back up.
The “38999 Cable Tester” executor reports completion, but I could not access its detailed report, inspect the resulting schematic, or reconcile its changes against the outstanding functional checks. No additional project changes were made in this turn.
Still required before PCB work resumes:
  • Verify all 55 contacts are scanned exactly once.
  • Validate hit capture, MULTIPLE indication, and NEXT-button sequencing.
  • Check displayed contact-number conversion and reset/startup behavior.
  • Confirm unused CMOS inputs are tied to defined logic levels.
  • Run fresh ERC/connectivity checks and an independent schematic review.
Execution stopped because your ACUs ran out.
Review tester schematic
Check contact coverage
Review sequencing logic
Check CMOS inputs
Run electrical review

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Project Specification
Project Overview
  • Status: Draft implementation
  • Modular, firmware-free cable ring-out tester using only off-the-shelf non-programmable analog and digital logic.
  • Initial adapter: MIL-DTL-38999 Series III, shell size 17, insert arrangement 17-35, 55 contacts.
Intended Use
A technician mates the tester to one end of a de-energized cable, then touches the integrated probe to remote test points. The hardware repeatedly scans contacts 01-55, displays a detected contact, indicates when multiple contacts share the probe point, and advances through live detections when NEXT is pressed.
What the Device Should Do
  • Scan at least 55 contacts without an MCU, firmware, CPLD, FPGA, or custom ASIC.
  • Display contact numbers in decimal on two seven-segment digits.
  • Illuminate a MULTIPLE indicator when at least two contacts are detected in one complete scan.
  • NEXT searches forward from the displayed contact and latches the next currently detected contact, wrapping at 55.
  • Show a blank or dash state when no contact is detected.
  • Operate only on isolated, de-energized cable assemblies.
Main Features
  • Swappable passive connector-adapter board.
  • Standard CMOS/74HC counters, analog multiplexers, comparators/Schmitt logic, latches, and display drivers.
  • Two-digit decimal LED display.
  • Dedicated MULTIPLE LED and NEXT pushbutton.
  • USB-C 5 V power input; logic may operate directly at regulated 5 V.
  • No programming interface or software dependency.
System Architecture

Diagram


USB-C 5 V input Protected regulated logic rail Schmitt oscillator Modulo-55 decimal scan counters Bank select and analog multiplexers Swappable 38999 adapter: contacts 01-55 Probe with pull-up and protection Comparator or Schmitt detector Hit pulse and frame hit counter MULTIPLE latch and LED First-hit and NEXT-search control Displayed-address latch BCD seven-segment drivers and two digits
Hardware Subsystems
Connector Adapter
  • Passive replaceable board maps a connector-specific pinout to a standardized interface of at least 55 contacts plus shield/ground and reserved positions.
  • Exact Series III 17-35 contact identifiers, mating sex, keying, and mechanical drawing must be verified before adapter PCB layout.
Scanner
  • A clocked modulo-55 decimal address generator steps from 01 through 55.
  • BCD ones and tens values directly drive two decimal display drivers and the multiplexer address/bank decode logic.
  • Multiple standard analog multiplexers connect exactly one cable contact at a time to the continuity detector.
Continuity Detector
  • The probe node is biased to a known state and protected against ESD/handling.
  • A selected contact connected to the probe produces a clean hardware HIT pulse using a comparator or Schmitt-trigger stage.
  • RC filtering and hysteresis provide hardware debounce/noise rejection.
Display and Selection Logic
  • BCD latches hold the displayed scan address.
  • On the first stable hit after an empty state, the current address is latched.
  • Pressing NEXT arms a forward search; the next detected address is latched and search stops. Repeated presses cycle through currently live hits.
  • Two BCD-to-seven-segment drivers operate a two-digit common-anode or common-cathode display selected to match the driver.
Multiple Detection
  • A per-frame saturating hit counter records zero, one, or two-or-more detections.
  • At the end of each 01-55 frame, a latch updates the MULTIPLE LED from the two-or-more state, then resets the frame counter.
Power
  • USB-C sink-only 5 V input with independent 5.1 kOhm CC pull-downs.
  • Resettable fuse and 5 V TVS protection.
  • Logic rail filtered and regulated as needed for the selected HC/CMOS family.
Interfaces and Connections
  • USB-C: power only.
  • Adapter interface: contacts 01-55, probe/shield return, and reserved positions.
  • Probe jack: shrouded banana or locking test-lead connector.
  • User controls: NEXT button; optional RESET/CLEAR button.
Power and Runtime Expectations
  • USB powered; no battery in the first revision.
  • Peak input target below 250 mA with both LED digits illuminated.
Power Tree and Power Budget

Table


LoadTypicalPeak
CMOS/74HC scanner logic and multiplexers15 mA40 mA
Comparator, oscillator, and control logic5 mA15 mA
Two-digit LED display30 mA80 mA
Indicator LEDs and margin10 mA25 mA
Total60 mA160 mA
Power protection and any regulator must support at least 250 mA.
Manufacturing and Assembly Expectations
  • Professional SMD controller PCB, likely 2-4 layers due to the larger logic IC count.
  • Separate adapter PCB for each connector family/insert arrangement.
  • Use keyed/shrouded board interconnects to prevent adapter reversal.
Hardware Timing Requirements
  • Full 55-contact scan refresh target: at least 20 Hz.
  • Contact dwell target: approximately 100-500 microseconds, allowing RC/comparator settling.
  • NEXT button must be hardware-debounced.
  • End-of-frame sequencing must latch MULTIPLE before resetting the hit counter.
Physical Design Expectations
  • Bench/handheld enclosure with the MIL connector exposed, probe cable strain relief, visible digits, and accessible controls.
Important Design Decisions
  • No MCU, firmware, programmable logic, or custom silicon.
  • Decimal counters simplify decimal display and allow the displayed address to be latched directly without binary-to-BCD conversion.
  • NEXT does not require a 55-bit memory: it arms the scanner to latch the next live hit encountered after the current displayed address.
  • Connector-specific mechanics and pin mapping remain on a passive adapter.
Safety Constraints
  • Connect only to de-energized, electrically isolated cable assemblies.
  • Input protection is for ESD and low-energy mistakes, not powered avionics or vehicle buses.
Assumptions
  • Contact plus cable resistance is below 100 ohms for a valid closure.
  • The scan speed is fast enough that searching for the next live hit appears immediate.
  • Displaying decimal 01-55 is preferred to hexadecimal contact indexing.
Change Notes
  • Replaced the MCU/firmware architecture with standard non-programmable analog and digital logic at the user's request.
  • Retained the modular 55-contact adapter concept and MULTIPLE/NEXT behavior.
  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Connector Adapter

  • Scanner

  • Continuity Detector

  • Display and Selection Logic

  • Multiple Detection

  • Power

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Hardware Timing Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Safety Constraints

  • Assumptions

  • Change Notes