PhotoTherapy Workflow Review

flux

Local controller-zone placement is complete and PASS. U_TEENSY1 is at (160.00, 113.50) mm, 0°; J_PI1 is at (195.00, 113.50) mm, 0°, near the right board edge with outward ribbon exit and about 35 mm from the Teensy center.
NUCLEO coordinates unchanged: Yes — CN7 remains (55.00, 20.00), CN10 remains (115.96, 20.00), spacing 60.96 mm. Focused controller-zone check found only U_TEENSY1 and J_PI1 in their new region, no local collisions, and no routing was performed.

flux

Removed all 113 dedicated TP/Keystone 5018* test-point components from schematic and PCB; remaining TP components = 0, remaining Keystone 5018 footprints = 0, and NUCLEO coordinates stayed unchanged.
Result: PASS for test-point removal — required nets are still present with reduced connection counts; no routing or component movement was performed. The single post-removal check reports no TP/5018 remains, but still shows pre-existing keepout/pin warnings and one footprint-internal overlap source at Q_RESET1; initial overlap was not directly reported by the available checker, final explicit overlap source count = 1 (Q_RESET1).
A

arronte1972

fix placement and keep out

flux

Placement/keepout cleanup is complete and the board check now passes: Board valid = yes, with no routing feasibility issues detected. I did not route, and the verified NUCLEO sockets stayed unchanged at CN7 (55.00, 20.00) and CN10 (115.96, 20.00).
What changed: converted the problematic routing-blocking keepout zones into non-blocking documentation outlines, removed global false keepout rules from copper objects, and replaced/reconnected Q_RESET1 with a clean MMBT3904 footprint.
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Files

Schematic

Layout

3D View

Phase 2 — Module and Connector Pinouts
Scope: Only J_PI1, U_TEENSY1, and U_NUCLEO1 were created/verified. No laser channels, monitoring circuits beyond reserved/label pins, or power-entry circuitry were added.
Raspberry Pi 5 connector — J_PI1
Verification source: Raspberry Pi 40-pin GPIO header documentation. Library symbol pin naming/physical numbering matched physical pins 1–40. Connector mechanical orientation remains to be reviewed before PCB layout.

Table

Physical pinMCU/Header pin namePeripheral functionNet / statusConflict statusVerification status
13.3V3.3 V powerNCOK — explicitly not connectedVerified header role
25V5 V powerNCOK — explicitly not connectedVerified header role
3GPIO2I2C SDANCOKVerified header pin
45V5 V powerNCOK — explicitly not connectedVerified header role
5GPIO3I2C SCLNCOKVerified header pin
6GNDGroundDGNDOKVerified header pin
7GPIO4GPIONCOKVerified header pin
8GPIO14UART TXDPI_UART_TXOKVerified
9GNDGroundDGNDOKVerified
10GPIO15UART RXDPI_UART_RXOKVerified
11GPIO17GPIONCOKVerified header pin
12GPIO18PCM_CLK / I2S BCLKPI_I2S_BCLKOKVerified
13GPIO27GPIONCOKVerified header pin
14GNDGroundDGNDOKVerified
15GPIO22GPIONCOKVerified header pin
16GPIO23GPIONCOKVerified header pin
173.3V3.3 V powerNCOK — explicitly not connectedVerified header role
18GPIO24GPIONCOKVerified header pin
19GPIO10SPI MOSINCOKVerified header pin
20GNDGroundDGNDOKVerified
21GPIO9SPI MISONCOKVerified header pin
22GPIO25GPIONCOKVerified header pin
23GPIO11SPI SCLKNCOKVerified header pin
24GPIO8SPI CE0NCOKVerified header pin
25GNDGroundDGNDOKVerified
26GPIO7SPI CE1NCOKVerified header pin
27ID_SD / DNCHAT ID EEPROM SDANCOK — explicitly NCVerified header role
28ID_SC / DNCHAT ID EEPROM SCLNCOK — explicitly NCVerified header role
29GPIO5GPIONCOKVerified header pin
30GNDGroundDGNDOKVerified
31GPIO6GPIONCOKVerified header pin
32GPIO12PWM/GPIONCOKVerified header pin
33GPIO13PWM/GPIONCOKVerified header pin
34GNDGroundDGNDOKVerified
35GPIO19PCM_FS / I2S LRCLKPI_I2S_LRCLKOKVerified
36GPIO16GPIONCOKVerified header pin
37GPIO26GPIONCOKVerified header pin
38GPIO20PCM_DINPI_I2S_DATA_FROM_TEENSYOK — optional path connected per Teensy assignmentVerified
39GNDGroundDGNDOKVerified
40GPIO21PCM_DOUTPI_I2S_DATA_TO_TEENSYOKVerified
Teensy 4.1 socket module — U_TEENSY1
Verification sources: official PJRC Teensy 4.1 pinout/audio documentation. Library symbol is the available Teensy 4.1 module; terminal names use numeric labels with underscores.

Table

Teensy pinMCU/Header pin namePeripheral functionNet / statusConflict statusVerification status
0RX1UART receive from Pi TXPI_UART_TXOKVerified
1TX1UART transmit to Pi RXPI_UART_RXOKVerified
2Pin 2PWMTEENSY_PWM_01OKUser-approved assignment
3Pin 3PWMTEENSY_PWM_02OKUser-approved assignment
4Pin 4PWMTEENSY_PWM_03OKUser-approved assignment
5Pin 5PWMTEENSY_PWM_04OKUser-approved assignment
6Pin 6PWMTEENSY_PWM_05OKUser-approved assignment
7OUT1AI2S outputPI_I2S_DATA_FROM_TEENSYOK — optional path connectedVerified
8IN1I2S inputPI_I2S_DATA_TO_TEENSYOKVerified
10Pin 10PWMTEENSY_PWM_06OKUser-approved assignment
14Pin 14PWMTEENSY_PWM_07OKUser-approved assignment
15Pin 15PWMTEENSY_PWM_08OKUser-approved assignment
20LRCLK1I2S LRCLKPI_I2S_LRCLKOKVerified
21BCLK1I2S BCLKPI_I2S_BCLKOKVerified
22Pin 22PWMTEENSY_PWM_09OKUser-approved assignment
23MCLK1I2S master clockNC / RESERVEDOK — explicitly reserved and NCVerified
24Pin 24PWMTEENSY_PWM_10OKUser-approved assignment
25Pin 25PWMTEENSY_PWM_11OKUser-approved assignment
28Pin 28PWMTEENSY_PWM_12OKUser-approved assignment
29Pin 29PWMTEENSY_PWM_13OKUser-approved assignment
33Pin 33PWMTEENSY_PWM_14OKUser-approved assignment
36Pin 36PWMTEENSY_PWM_15OKUser-approved assignment
37Pin 37PWMTEENSY_PWM_16OKUser-approved assignment
Teensy NC pins presently marked NC: G_1, 9, 11, 12, 3V, 26, 27, 30, 31, 32, 34, 35, 38, 39, 40, 41, G_2, 13, 16, 17, 18, 19, 3V3, G_3, 5V. Pin 23 is RESERVED and NC.
NUCLEO-G474RE socket/module — U_NUCLEO1
Verification source: STMicroelectronics UM2505 Rev. 7 NUCLEO-G474RE / MB1367 Morpho connector table plus STM32G474RE datasheet function table for PA0/PA1/PA4/PB0. Only MONITOR_MUX_A0..A3 are assigned. TEMP_FREQ_CAPTURE and POWER_MONITOR_ADC remain unassigned pending timer/ADC verification. No Teensy-to-NUCLEO bus was created.

Table

FunctionPhysical header positionMCU pin namePeripheral functionNet / statusConflict statusVerification status
MONITOR_MUX_A0CN7 pin 28PA0 / A0GPIO; ADC12_IN1; timer-capable alternatives existMONITOR_MUX_A0OKVerified provisional candidate
MONITOR_MUX_A1CN7 pin 30PA1 / A1GPIO; ADC12_IN2; timer-capable alternatives existMONITOR_MUX_A1OKVerified provisional candidate
MONITOR_MUX_A2CN7 pin 32PA4 / A2GPIO; ADC2_IN17; TIM3_CH2 alternateMONITOR_MUX_A2OKVerified provisional candidate
MONITOR_MUX_A3CN7 pin 34PB0 / A3GPIO; ADC3_IN12 / ADC1_IN15; TIM3_CH3 alternateMONITOR_MUX_A3OKVerified provisional candidate
TEMP_FREQ_CAPTURETBDTBDTimer capture requiredRESERVED / unassignedOK — deliberately unassignedVerification required
POWER_MONITOR_ADCTBDTBDADC input requiredRESERVED / unassignedOK — deliberately unassignedVerification required
POWER_TOO_LOWTBDTBDDigital input/logic TBDRESERVED / unassignedOKVerification required
POWER_TOO_HIGHTBDTBDDigital input/logic TBDRESERVED / unassignedOKVerification required
GLOBAL_RETURN_FAULTTBDTBDDigital input/logic TBDRESERVED / unassignedOKVerification required
POWER_PEAK_RESETTBDTBDDigital output TBDRESERVED / unassignedOKVerification required
GLOBAL_LASER_DISABLETBDTBDShutdown output TBDRESERVED / unassignedOKVerification required
NUCLEO unassigned Morpho pins marked NC: all CN7/CN10 pins except PA0/CN7_28, PA1/CN7_30, PA4/CN7_32, and PB0/CN7_34.
Verification results
  • Components present: J_PI1, U_TEENSY1, U_NUCLEO1 only, plus net portals automatically created for labels.
  • Authorized Pi↔Teensy nets verified: PI_UART_TX, PI_UART_RX, PI_I2S_BCLK, PI_I2S_LRCLK, PI_I2S_DATA_TO_TEENSY, PI_I2S_DATA_FROM_TEENSY.
  • Pi power pins 1, 2, 4, and 17 are NC.
  • Pi ID pins 27 and 28 are NC.
  • Teensy PWM labels TEENSY_PWM_01 through TEENSY_PWM_16 are assigned to the requested pins.
  • NUCLEO A0–A3 provisional monitor mux candidates are assigned only to PA0, PA1, PA4, and PB0.
  • No Teensy-to-NUCLEO UART/SPI/I2C/data bus was created.
  • ERC note: U_NUCLEO1 power input pins AVDD, VDD, VIN, and VBAT still report missing power because Phase 2 explicitly excludes power circuitry. These are expected open issues until the power/interface phase.

  • Raspberry Pi 5 connector — J_PI1

  • Teensy 4.1 socket module — U_TEENSY1

  • NUCLEO-G474RE socket/module — U_NUCLEO1

  • Verification results