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The prior routing job no longer exists, so I’m starting a fresh pass. The only preflight warnings are the USB-C connector’s own shield/GND pads inside its footprint keepouts; the router explicitly ignores those local keepouts, so no placement change is needed.
A fresh routing job was started and preserved as auto-layout-3402e732-f0c9-4eac-9443-2011ebf33390, but paused because no ACUs remain. The board currently has 78 airwires, plus USB-C keepout warnings and one board-boundary placement error; after adding ACUs, resume this job, resolve the boundary issue, then complete routing and final DRC.
proceed
The saved routing job has expired, so I’m starting a new full-board route from the existing placement and neckdowns. The remaining preflight warnings are limited to USB-C shield/ground pads within their own footprint keepouts.
A new routing job was created and preserved as auto-layout-5ab1a155-8eb2-4ce1-a495-1f8df4b1f161, but paused because no ACUs remain.
Remaining
  • Add ACUs and resume this job.
  • Resolve one board-boundary placement error.
  • Review six USB-C shield/GND footprint-keepout warnings.
  • Complete routing and verify zero airwires and blocking DRC errors.
Review board-boundary error
Inspect USB-C warnings
Prepare routing constraints

Schematic Verification Report
Scope Status

Table


ItemStatusEvidence / note
USB-C charging and protected-cell battery blockCompletedCC sink resistors, PPTC, TVS, MCP73831 support capacitors, 3.3 kΩ PROG, charge LED, battery connector wired
Master load isolationCompletedAO3401A high-side stage with 100 kΩ gate-source pull-up and low-current slide switch
Regulated 3.3 V railCompletedTPS63031 fixed buck-boost, 1.5 µH, input/VINA/output capacitors, FB tied to output
MCU and programmingCompletedSTM32G030F6 power/reset support and SWD header wired
Two Hall channelsCompletedSeparate DRV5032AJ inputs, pull-ups, and local bypass capacitors
ARM and RETRACT controlsCompletedDeterministic ARM pull-down; separate active-low RETRACT button with pull-up
Launcher release driverCompletedDefault-off AO3400A low-side stage, 100 Ω gate resistor, 100 kΩ gate pull-down, SS34FA flyback, external connector
Retraction motor driverCompletedDRV8837, separate controls, default sleep behavior, local 100 nF bypass and 220 µF bulk, motor connector
Charger-present interlock signalCompleted100 kΩ / 100 kΩ USB divider to USB_PRESENT MCU input
ERC / schematic checksCompletedNo matching open ERROR, WARNING, OPEN, or UNCERTAIN findings in selected ERC, passive, and legibility reviews
Detailed visual block placementPartially completedFunctional Groups and named-net stubs preserve logical readability, but the available mutation API did not expose schematic component-arrangement controls for a final compact block reflow
Main Part Selection
  • MCU: STM32G030F6Px, compact Cortex-M0+ with sufficient GPIO and SWD.
  • Charger: MCP73831T-2DCI/OT, programmed to about 303 mA.
  • 3.3 V regulator: TPS63031DSKR fixed buck-boost.
  • Hall sensors: 2 × DRV5032AJDBZR, omnipolar open-drain outputs.
  • Motor driver: DRV8837DSGR, bidirectional H-bridge with 1.8 A peak class capability.
  • Release MOSFET: AO3400A logic-level N-channel MOSFET.
  • Master isolation MOSFET: AO3401A P-channel MOSFET.
  • Flyback diode: SS34FA 3 A Schottky.
Current-Limit Summary
  • Charge current: 1000 / 3.3 kΩ ≈ 303 mA.
  • 3.3 V rail requirement: 50 mA peak; regulator selected with large margin.
  • Reflected logic input at 3.0 V, assuming 85% efficiency: about 65 mA.
  • Mutually exclusive worst battery event: approximately 1.07 A including logic.
  • Battery power path design target: at least 1.5 A transient.
  • DRV8837 motor peak capability class: 1.8 A; intended motor transient limited to 1.0 A.
  • AO3400A and AO3401A conduction losses at ~1 A are low enough for short wearable transients, subject to PCB copper and thermal layout verification.
Remaining Assumptions / Follow-up
  • Confirm the selected protected LiPo capacity permits a ~303 mA charge rate.
  • Confirm the real actuator and motor stall/pulse currents do not exceed 1.0 A.
  • PCB layout must use wide/short battery, actuator, motor, and ground paths and suitable copper around Q1, Q2, and U6.
  • The 220 µF and 470 µF capacitors are intentionally larger than 0603 because transient energy storage requires larger packages.
  • Firmware is a required safety layer: dual-Hall interval validation, ARM gating, USB-present inhibit, launch timeout, and launch/retract mutual exclusion.
  • Scope Status

  • Main Part Selection

  • Current-Limit Summary

  • Remaining Assumptions / Follow-up