Schematic Alignment Instructions

flux

  • Set Project Description to "PCB project for a Universal E-Paper Adapter, specifically aligning schematic and documentation to reference tasks in PDF: gro..."
  • Set System Architecture to "graph TD MCU[MCU Block] Power[Power Block] EpaperFPC[E-paper FPC Block] Multiplexer[Multiplexer Block] P..."
  • Set Block to "MCU Block"
  • Set Block to "Power Block"
  • Set Block to "E-paper FPC Block"
  • Set Block to "Multiplexer Block"

Worked

0:44

flux

Work done
  • Project description updated with grouping, net naming, pin mapping, ground symbols, ERC hashtag
  • System Architecture property added with mermaid diagram
  • Block property applied: • MCU: IC1, Y1, C2, C23, C28, C1, C16, C22 • Power: U1, L2, Q1, D4, D5, C15, C17, C19, C25, R1, R2, D2 • E-paper FPC: J1, J2 • Multiplexer: M1
  • Nets renamed: • SPI: Net 13→SCK, Net 14→MOSI, Net 48→MISO, Net 15→CS# • Control: Net 11→D/C#, Net 16→RES#, Net 17→BUSY • MUX: Net 27→S0, Net 28→S1, Net 30→S2, Net 29→S3 • +3V3 rail net
  • GND portals replaced with standard Ground symbols
  • ERC run: no errors
Tasks left unmarked
  • Connector pin labels on J1 and J2 to match PDF pin map (requires manual mapping)
Success criteria review ✅ Components grouped into four blocks ✅ Nets renamed per PDF conventions ⚠️ Connector pin labels: pending ✅ Ground symbols standardized ✅ ERC clean
Recommended next step Review and update FPC connector pin labels on J1 and J2 to match the PDF map, then re-run ERC.
C1 P2 - GND GND
C1 P2 - GND GND
J1 - FPC Access Point
3v3
Terminal Order
Terminal Order
J2 - FH34SRJ-24S-0.5SH(50) - Broadcast
U1
C19
Capacitance
1U F
C17
Capacitance
1U F
C24
Capacitance
1U F
C25
Capacitance
4.7uF
R1
Resistance
10kΩ
D2
D5
GND
C15
Capacitance
4.7µF
D3
D4
C16
Capacitance
1U F
R2
Resistance
0.47 Ω
C2
Capacitance
12.5pF
C23
Capacitance
1U F
C28
Capacitance
100NF
C22
Capacitance
1U F
D1
C20
Capacitance
1U F
C21
Capacitance
1U F
C18
Capacitance
1U F
C1
Capacitance
12.5pF
C4
Capacitance
1uF
C3
Capacitance
1uF
IC1 - ESP32-C3
L2
Resistance
68uH Ω
Y1 - 32.768 kHz ±20ppm Crystal
AE1 - ANTENNA
C1 P2 - GND GND
Q1
M1 - Multiplexer
C1 P2 - GND GND

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    v2/Universal E-Paper adapter PCB-AP

    v2/Universal E-Paper adapter PCB-AP thumbnail
    E-Paper Display Driver Board Schematic Alignment

    Properties

    PCB project for a Universal E-Paper Adapter, specifically aligning schematic and documentation to reference tasks in PDF: grouping components into function blocks, standardizing net names (SPI nets, multiplexer selects, +3V3, etc.), mapping connector functions, and updating all ground/portals to a common ground symbol.

    graph TD MCU[MCU Block] Power[Power Block] EpaperFPC[E-paper FPC Block] Multiplexer[Multiplexer Block] Power --> MCU Power --> EpaperFPC MCU --> Multiplexer Multiplexer --> EpaperFPC MCU --> EpaperFPC

    MCU Block

    Multiplexer Block

    Power Block

    E-paper FPC Block

    Pricing & Availability

    Distributor

    Qty 1

    Arrow

    $1.62–$3.50

    Digi-Key

    $4.95–$9.01

    LCSC

    $6.73

    Mouser

    $9.71

    Verical

    $3.32–$5.31

    Controls