ESP32S3 Schematic Design

Reviewed active components compatibility

2:43

Started: Review active components for headroom and compatibility and update component properties as needed.

Updated properties for 12 objects

0:13

Set U1's Operating Voltage to "3.3"

Set U2's Operating Voltage to "3.3"

Set U2's Role Details to "Mono I2S DAC/AMP, VDD = 3.3V"

Set U3's Operating Voltage to "3.3"

Set U4's Operating Voltage to "3.3"

Set U6's Output Voltage to "3.3"

Set U6's Operating Voltage to "3.3"

Set U7's Output Voltage to "5"

Set U7's Operating Voltage to "5"

Set U8's Input Voltage to "5"

Set U8's Charge Voltage to "4.2"

Set U8's Role Details to "TP4056 LiPo charger module with onboard protection; USB VBUS input -> BAT output"

Set U9's Output Voltage to "3.3"

Set U9's Operating Voltage to "3.3"

Set U9's Role Details to "3.3V LDO for ESP32-S3 and peripherals; input from BAT/TP4056 output"

Set J2's Voltage to "5"

Set J2's Role Details to "USB-C VBUS and data connector for programming/debug"

Set J5's Role Details to "1S LiPo battery connector (JST PH series)"

Set L1's Current Rating to "1"

Set MK1's Operating Voltage to "3.3"

Verified all component footprints

1:01

Started: Verify footprints for all components and update generic passive package sizes as needed.

Selected single-sided, standard stackup

1:00

Started: Select a single-sided, standard stackup.

Set board dimensions

0:57

Started: Set the board dimensions to 45 mm × 12 mm.

Configured top copper ground fill

1:16

Started: Configure copper layers (top copper only) and apply ground fill on the top layer.

Defined RF keep-out region

1:05

Started: Define the RF keep-out region or place the u.FL footprint zone.

Set board dimensions to 45×12 mm

1:49

Started: Pause for user review of board size, RF keep-out, and mounting/test-pad strategy.

Updated 1 net

0:10

Disconnected IC1:PGND

Defined RF keep-out region

1:14

Started: Classify all nets by type and update net properties accordingly.

Setting appropriate trace widths for power nets...

0:37

Started: Set appropriate trace widths for power nets based on peak current requirements.

Setting +5V power net width...

0:41

Started: Set appropriate trace width for the +5V power net based on its peak current requirements.

Worked

0:24

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    Assets

    ESP32-S3-WROOM-1 Reference Design.png

    ESP32-S3-WROOM-1 Reference Design.png

    ESP32-S3-WROOM-1 Reference DesignThumbnail

    ESP32-S3-WROOM-1 Reference Design aLf8

    ESP32-S3-WROOM-1 Reference Design aLf8 thumbnail
    Compact ESP32-S3 Smart Glasses Starter PCB with OV2640 Camera, I2C Mux, I2S Audio, LiPo Charging, and USB-C Debug Interface

    Properties

    graph TD USB_TYPEC((USB-C Connector)) -->|VBUS| REG_5V3V((3.3V Regulator)) -->|3.3V| ESP32[ESP32-S3-WROOM-1] REG_5V3V -->|3.3V| MAX98357A[MAX98357A I2S DAC/AMP] REG_5V3V -->|3.3V| TCA9548A[TCA9548APWR I2C Mux] ESP32 -->|I2S| MAX98357A ESP32 -->|I2C| TCA9548A TCA9548A -->|I2C Channels| CAMERA_OV2640_OVS[OV2640 Camera via FPC] ESP32 -->|DVP: D0-D7, PCLK, HSYNC, VSYNC, XCLK| CAMERA_OV2640_OVS CAMERA_OV2640_OVS -- FPC --> FPC24_Connector((24-pin FPC Connector)) subgraph Power USB_TYPEC REG_5V3V end subgraph Connectors USB_TYPEC FPC24_Connector PROG_DEBUG(Programming/Debug Header) end ESP32 -- PROG/DEBUG --> PROG_DEBUG

    graph TD USB_TYPEC((USB-C Connector)) -->|VBUS| REG_5V3V((3.3V Regulator)) -->|3.3V| ESP32[ESP32-S3-WROOM-1] REG_5V3V -->|3.3V| MAX98357A[MAX98357A I2S DAC/AMP] REG_5V3V -->|3.3V| TCA9548A[TCA9548APWR I2C Mux] ESP32 -->|I2S| MAX98357A ESP32 -->|I2C| TCA9548A TCA9548A -->|I2C Channels| CAMERA_OV2640_OVS[OV2640 Camera via FPC] ESP32 -->|DVP: D0-D7, PCLK, HSYNC, VSYNC, XCLK| CAMERA_OV2640_OVS CAMERA_OV2640_OVS -- FPC --> FPC24_Connector((24-pin FPC Connector)) subgraph Power USB_TYPEC REG_5V3V end subgraph Connectors USB_TYPEC FPC24_Connector PROG_DEBUG(Programming/Debug Header) end ESP32 -- PROG/DEBUG --> PROG_DEBUG

    creativecommons.org/licenses/by/4.0/

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    Controls