Fixing ERC/DRC Errors and Routing
Worked for 8 mins 50 sec
Replacement/placement completed, but validation found two remaining blocker types: stale traces from the old footprints and U7 still has duplicate exposed-pad footprint geometry. I’m correcting U7 with a different clean same-function BQ24074 package entry, then deleting stale traces before rechecking.
Worked
Pre-routing check is now clean, so I’m spending the routing ACUs now. I also removed the last stale trace first to avoid wasting a routing pass.
Thought
Blocked: the project ran out of ACUs during the auto-route job, so I can’t continue tool work in this run.
Completed so far:
- Replaced the problematic footprint components:
- U1 ESP32-S3 module
- U3 MAX-M10S GNSS
- U7 BQ24074 charger/power path
- U8 TPS63070 buck-boost regulator
- Restored their original functional connections: USB, GPS UART, I2C, I2S mic, battery charger, SYS/3V3 power, boot/reset.
- Re-placed the replacements on the PCB.
- Removed stale/dangling traces from the old footprints.
- Fixed the SYS rail reconnection for C12/R15.
- Reduced small-pin routing width for U8 BB_L1 and BB_VAUX.
- Got the board to pass the pre-routing feasibility check before routing was attempted.
Remaining:
- Add ACUs, then re-run routing.
- The paused route reported USB differential pair routing stalled, so after ACUs are available the next step is to adjust/route USB_DP/USB_DN specifically, then run final ERC/DRC/airwire checks.
- U3:VIO_SEL may still appear as a false ERC issue; per MAX-M10S datasheet it should be left open for 3.3 V V_IO operation.
Route USB first
Verify VIO_SEL
Run final checks
Inspect footprints
