PCB Design for ESP32 Project
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Work done
- Removed receiver-only parts: K1, D5, J5.
- Identified the root cause of the Hot/Neutral short: mains nets are currently collapsed into a single net (shown as
N_AFTER_CHOKE) that incorrectly includes both pins of F1, both pins of RV1, and both pins of C3, as well as both PS1 AC/L and AC/N.
Success criteria review
- ✅ Receiver-only parts removed.
- ❌ Mains connectivity reconfigured: blocked by the existing net collapse (Hot and Neutral still shorted by net labeling/portals).
- ❌ Bridge/opto sense tap verification: cannot be trusted until Hot/Neutral nets are split.
- ❌ ERC pass: ERC currently reports shorted F1, RV1, and C3 due to the net collapse.
- ❌ Ready-for-routing safety partition: cannot be validated until ERC is clean.
Next steps
- In the schematic editor, delete and re-place the net labels/portals that define the choke outputs and fused-hot node, then re-run ERC. The intended nets are:
- Once those labels/portals are fixed (so ERC no longer flags F1/RV1/C3 as shorted), I can finish the net reassignment with a single batch wiring update and re-check ERC for you.
54 days
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