RK806-1 Pinout Verification

Fixed the RK806-1 terminal Pin Type assignments from the datasheet.
Key changes:
  • VCCx, VCCA, VCC11–14Power In
  • SWx, NLDOx, PLDOx, VCCIOPower Out
  • VOUTx, FBx, PWRON, CS, CLK/SCL, VDCInput
  • MOSI/SDA, MISO/PWRCRTL3, SYNC, SYNC_CLK, EXT_EN, RESETB, PWRCRTL1/2Bi-Directional
  • INTOutput
  • ePADGround
I verified the updated properties and the part review checks show no unresolved terminal/property warnings or errors. Note: I only changed Pin Type as requested; the older Terminal Type metadata is still present but should no longer be the authoritative pin classification.
Search through all the pins of this part, see if there's invalid values like [Object Object]?
I’ll inspect every RK806-1 pin property directly from the schematic and look for malformed values such as [Object Object] in pin names, pin numbers, pin types, descriptions, and related terminal metadata.
I scanned all 69 RK806-1 terminals/pins.
No [Object Object]-style malformed values were found in the visible pin properties. The structured Symbol Pin Position values are valid JSON/vector data, not malformed text.
One thing to note: every terminal shows its internal Pins: entry as undefined, but the actual terminal metadata is present and valid: designator, pin number, pin type, section, group, and symbol position. The terminal review checks also returned no unresolved pin/property issues.
Fix undefined pins
Review SW9 properties
Check datasheet pins
Ignore-safe properties
VCC10
VOUT10
VOUT9
PLDO1
PWRCRTL1
VCC8
VCC7
VOUT2
NLDO3
VCC9
VCC11
SW7
NLDO4
MISO/PWRCRTL3
NLDO2
VOUT4
PLDO3
SW10
SYNC
VCC13
SW1
VCC4
PLDO2
VCC3
VCCA
SW4
NLDO1
VCC14
VCC12
VOUT1
SW9
NLDO5
MOSI/SDA
VCC1
VCC1
CS
CLK/SCL
PWRCRTL2
INT
SW1
PLDO5
SW2
SW3
FB9
PLDO4


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RK806-1

RK806-1 thumbnail
QFN-68(7x7) Power Management - Specialized ROHS
The RK806-1 is a multi-channel PMIC designed to deliver and manage power for modern embedded platforms. It integrates multiple high-efficiency DC-DC buck converters, LDO regulators, and a configurable power sequencing controller in a compact QFN-68 package.
It is tightly coupled with Rockchip SoCs and is responsible for generating stable voltage rails for CPU cores, GPU, DDR memory, and peripheral blocks.
⭐ Key Features ⚡ 1. High-Integration Power Architecture Multiple synchronous buck converters (high-current rails for CPU/GPU) Several LDO regulators for low-noise analog and IO domains Supports dynamic voltage scaling (DVS) for performance optimization 🔌 2. Wide Output Capability Output voltage range: ~0.5 V to 3.4 V per channel Designed for modern low-voltage SoC power domains Supports both high-current and low-noise power rails 🧠 3. Programmable Power Sequencing OTP / register-configurable power-up & power-down sequence Ensures safe startup for multi-rail SoCs Supports synchronized sequencing with multiple PMICs 📡 4. Digital Control Interface I²C and SPI interface for configuration and control Real-time voltage adjustment per processor demand Register-based control for power modes and telemetry 🛡️ 5. Protection & Reliability Features Over-voltage protection (OVP) Over-current protection (OCP) Thermal shutdown protection Soft-start for inrush current control ⚙️ 6. Efficiency & Performance Optimizations High-frequency switching (~MHz range) for smaller external components Fast transient response for CPU load changes Low standby current for power-sensitive designs 📦 7. Package & Integration QFN-68 (7×7 mm) compact package High thermal efficiency for dense PCB layouts Minimal external components required 📌 Typical Applications Single-board computers (SBCs) AI edge computing devices Tablets and industrial embedded systems Consumer electronics using Rockchip SoCs (e.g., RK3588 platforms)

Properties

Integrated Circuit

Rockchip

RK806-1

QFN35P700X700X80-69N

U

C5156483

parametric-v1

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