RK3566 Library Audit

K

klerne

flux

Scoped RK3566 library audit and repair
Audit this real RK3566 part against its stored LCSC Rockchip full datasheet (datasheet query works). Main design is /klerne/secure-wireless-nvme-backup; do not mutate main board. Need all 565 ball mappings/footprint geometry validated, especially systematic labels A118 versus actual 1A18 and B116 versus 1B16. Datasheet confirms EMMC_D0 A32, D1 B27, D2 B32, D3 B29,D4 B33,D5 A30,D6 B30,D7 A33,CMD A27,CLK A29, STROBE 1A16,RST 1B16. Library presently labels outer 1A16 as A116. Check whether systematic alias preserves actual coordinates or is erroneous. If repair safe, correct terminal/pad labels and pin types, preserve UUIDs and symbol names as possible, then publish updated usable version. Also audit all grounds/power classifications (AVSS1 currently Unspecified). Source facts first; full footprint verification required; report exact changes, updated part UID/version and unresolved issues. Parent will build logical schematic using actual pin names. Do not create speculative geometry or claim fabrication ready without evidence.

flux

I’ll compare the RK3566 terminal mapping and footprint against the stored datasheet, then repair and publish only if the source geometry and edit permissions support a safe change. I won’t modify the main board.
Exported a file export
rk3566.kicad_pcb
KICAD export

flux

Blocked from repair/publish: adrian95/rk3566 is view-only; I inspected all 565 terminal records and enumerated 565 pad identities, exported the KiCad footprint, made no changes, and produced no updated part UID/version.
Confirmed defects: library A118, A116, and B116 correspond by signal name to datasheet 1A18 (FSPI_D1), 1A16 (EMMC_DATA_STROBE), and 1B16 (EMMC_RSTn); all 14 AVSS1 terminals are Unspecified despite being Analog Ground, many VSS/AVSS terminals are also Unspecified, and the ten supplied eMMC data/CMD/CLK assignments match the inspected library (mapping evidence dsq_2bd917c50c982aa0ff70 ds1–ds3; AVSS1 evidence dsq_9bbea3093aad3a09d3d4 ds1; eMMC evidence dsq_3518ae1192e3ea8f87a5 ds1).
Full footprint validation remains unresolved: selected pads occupy a consistent 0.65-mm lattice—A116 at (3.575, 5.525), B116 at (3.575, 4.875), A118 at (4.875, 5.525) mm—but exact source-relative coordinates and all 565 signal-to-pad correspondences are not established, so I cannot certify that the aliases preserve correct geometry; edit access or an editable copy is needed to continue, and I filed an internal part-quality ticket for Flux engineering review.
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Files

Pins

Symbol

Layout

3D View

Name
Pin #
Type
Section
Pin Group
VSS_1
A1
Ground
Power
VSS_2
A2
Unspecified
DDR4_CS1N/LPDDR4_CS1N_A/DDR3_CS1N/LPDD_R3_ODT1/AC26_
A3
Unspecified
DDR4_CLKP/LPDDR4_CLKP_A/DDR3_CLKP/LPDD_R3_CLKP/AC23
A5
Unspecified
DDR4_A0/LPDDR4_CLKP_B/DDR3_A9/-/AC0_
A7
Output
Data
DDR4_A13/LPDDR4_A0_B/DDR3_A14/LPDDR3_A_0/AC13
A9
Output
Data
DDR4_A7/LPDDR4_ODT0_CA_B/DDR3_A8/-/AC7
A10
Unspecified
DDR_DQS0N_B/DDR4_DQSU_N_B/LPDDR4_DQS_0N_B/DDR3_DQS2N/LPDDR3_DQS0N
A12
Unspecified
DDR_DQS0P_B/DDR4_DQSU_P_B/LPDDR4_DQS0_P_B/DDR3_DQS2P/LPDDR3_DQS0P_
A13
Bi-Directional
Data
DDR_DQ12_B/DDR4_DQL7_B/LPDDR4_DQ12_B/_DDR3_DQ28/LPDDR3_DQ16
A15
Bi-Directional
Data
DDR_DQS1P_B/DDR4_DQSL_P_B/LPDDR4_DQS1_P_B/DDR3_DQS3P/LPDDR3_DQS2P
A17
Unspecified
DDR_DQ9_B/DDR4_DQL2_B/LPDDR4_DQ9_B/DD_R3_DQ25/LPDDR3_DQ19
A19
Bi-Directional
Data
DDR_DQ10_B/DDR4_DQL4_B/LPDDR4_DQ10_B/_DDR3_DQ26/LPDDR3_DQ22
A20
Bi-Directional
Data
I2C3_SDA_M0/UART3_RX_M0/AUDIOPWM_LOUT__P/GPIO1_A0_U
A22
Bi-Directional
Communication
I2S1_MCLK_M0/UART3_RTSN_M0/SCR_CLK/GPIO_1_A2_D
A23
Output
Clock
I2S1_SDO2_M0/I2S1_SDI2_M0/PDM_SDI2_M0/P_CIE20_WAKEN_M2/GPIO1_B1_D
A26
Bi-Directional
Communication
EMMC_CMD/FLASH_WRN/GPIO1_C4_U_
A27
Bi-Directional
Communication
EMMC_CLKOUT/FLASH_DQS/GPIO1_C5_D
A29
Output
Communication
EMMC_D5/FLASH_D5/GPIO1_C1_U_
A30
Bi-Directional
Communication
EMMC_D0/FLASH_D0/GPIO1_B4_U_
A32
Bi-Directional
Communication
EMMC_D7/FLASH_D7/GPIO1_C3_U
A33
Bi-Directional
Communication
SDMMC1_PWREN/I2C4_SDA_M1/UART8_RTSN_M_0/GPIO2_B1_D_
A35
Output
Control
I2S2_LRCK_RX_M0/UART6_CTSN_M0/SPI1_CS0__M0/GPIO2_C0_D
A37
Bi-Directional
Communication

rk3566