Pin Function Grouping


Yes — based on the RA6E1 LQFP-64 datasheet, I’d group each physical pin only once by its primary/common function like this:
Power / Supply
  • VCC: pins 10, 19, 57
  • VCC_USB: pin 44
  • VBATT: pin 3
Ground
  • VSS: pins 7, 20, 56
  • VSS_USB: pin 47
Internal Regulator / Stabilization
  • VCL0: pin 4
  • VCL: pin 55
Analog Supply / References
  • AVCC0: pin 24
  • AVSS0: pin 25
  • VREFH: pin 23
  • VREFL: pin 32
  • VREFH0: pin 27
  • VREFL0: pin 26
Clock
  • XCIN: pin 5
  • XCOUT: pin 6
  • P213 / XTAL: pin 8
  • P212 / EXTAL: pin 9
Reset / Boot Mode
  • RES: pin 39
  • P201 / MD: pin 38
USB
  • USB_DP: pin 45
  • USB_DM: pin 46
Debug / SWD / JTAG
  • P300 / TCK / SWCLK: pin 33
  • P108 / TMS / SWDIO: pin 64
  • P110 / TDI: pin 61
  • P109 / TDO / SWO: pin 63
GPIO / Multifunction I/O
  • P400: pin 1
  • P402: pin 2
  • P411: pin 11
  • P401: pin 12
  • P410: pin 13
  • P409: pin 14
  • P408: pin 15
  • P407: pin 16
  • P000: pin 17
  • P500: pin 18
  • P015: pin 21
  • P014: pin 22
  • P004: pin 28
  • P003: pin 29
  • P002: pin 30
  • P001: pin 31
  • P301: pin 34
  • P302: pin 35
  • P303: pin 36
  • P304: pin 37
  • P208: pin 40
  • P205: pin 41
  • P206: pin 42
  • P207: pin 43
  • P200: pin 48
  • P100: pin 49
  • P102: pin 50
  • P103: pin 51
  • P104: pin 52
  • P105: pin 53
  • P106: pin 54
  • P113: pin 58
  • P112: pin 59
  • P111: pin 60
  • P101: pin 62
No pin is duplicated between groups. For pins with alternate functions, I placed them in the most common/primary group: power pins in power, oscillator pins in clock, USB data pins in USB, SWD/JTAG-capable pins in debug, and the remaining multifunction port pins in GPIO.
Apply it
I’ll apply the functional pin grouping to the part symbol, keeping each physical pin in only one group.
Core groups are applied. I’m normalizing the pin type values to Flux’s standard values and tagging the remaining multifunction port pins as GPIO.
Applied the datasheet-based pin grouping to the part symbol.
Groups used:
  • Power
  • Ground
  • Internal Regulator
  • Analog Supply / References
  • Clock
  • Reset / Boot Mode
  • USB
  • Debug / SWD / JTAG
  • GPIO
I also normalized pin types where appropriate, and each terminal/pin was assigned to only one primary functional group.
Verify grouping
Fix group names
Create pin table
Review symbol layout

Name
Pin #
Type
Section
Pin Group
Orientation
Order
Sub-symbol
P400
1
Bi-Directional
GPIO
P401
2
Bi-Directional
GPIO
P402
3
Bi-Directional
GPIO
VBATT
4
Power In
Power
VCL0
5
Passive
Internal Regulator
XCIN
6
Input
Clock
XCOUT
7
Output
Clock
VSS_1
8
Ground
Ground
P213/XTAL
9
Output
Clock
P212/EXTAL
10
Input
Clock
VCC_1
11
Power In
Power
P411
12
Bi-Directional
GPIO
P410
13
Bi-Directional
GPIO
P409
14
Bi-Directional
GPIO
P408
15
Bi-Directional
GPIO
P407
16
Bi-Directional
GPIO
VSS_USB
17
Ground
Ground
USB_DM
18
Bi-Directional
USB
USB_DP
19
Bi-Directional
USB
VCC_USB
20
Power In
Power
P207
21
Bi-Directional
GPIO
P206
22
Bi-Directional
GPIO
P205
23
Bi-Directional
GPIO

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