I’ll research the MPU-6050 manufacturer documentation and sourcing status, then create the application guide with cited pin connections, layout guidance, and clearly labeled alternatives.
I verified the required capacitors and an important layout exception: the exposed die pad must not be soldered to the PCB. The MPU-6050 is obsolete; I’ll flag sourcing risks and label the alternatives as redesign options, with unresolved register details explicitly marked.
The TDK InvenSense MPU-6050 is a six-axis MEMS inertial measurement unit combining a three-axis accelerometer and three-axis gyroscope, with digital I²C output (TDK product information). Its common integration is a microcontroller-connected motion sensor for orientation estimation, motion detection, and wearable or remote-control applications; this guide covers the bare IC, not a breakout module with its own regulator or level shifting.
Lifecycle warning: TDK lists MPU-6050 as obsolete and recommends ICM-42670-P with the explicit qualification that interchangeability is not guaranteed ([TDK product information](https://product.tdk.com/en/search/sensor/m...
Created the MPU-6050 Application and Usage Guide in project files, covering all seven requested sections with citations and source links. It highlights obsolete-part sourcing risks, the unsoldered exposed-pad requirement, and functionally similar—not drop-in—alternatives; unresolved register details are explicitly marked.
The TDK InvenSense MPU-6050 is a six-axis MEMS inertial measurement unit combining a three-axis accelerometer and three-axis gyroscope, with digital I²C output (TDK product information). Its common integration is a microcontroller-connected motion sensor for orientation estimation, motion detection, and wearable or remote-control applications; this guide covers the bare IC, not a breakout module with its own regulator or level shifting.
Lifecycle warning: TDK lists MPU-6050 as obsolete and recommends ICM-42670-P with the explicit qualification that interchangeability is not guaranteed (TDK product information). Prefer a currently supported IMU for a new production design.
1. Quick Specifications
Absolute maximum ratings are stress limits, not permissible operating conditions. Functional operation at those limits is not implied.
Table
Parameter
Recommended operating condition / typical value
Absolute maximum / stress limit
VDD supply
2.375–3.46 V; a regulated 3.3 V rail is a practical design choice.
−0.5 to +6 V. This does not make it a 5 V operating device.
VLOGIC supply
1.71 V to VDD; VLOGIC must not exceed VDD at any time.
−0.5 V to VDD + 0.5 V.
VDD operating current
3.9 mA typical with gyroscope, accelerometer, and DMP operating; this is not a guaranteed maximum.
A maximum supply-current design rating was not verified in this research.
VLOGIC operating current
100 µA typical.
Not verified as a maximum-current rating.
Temperature
Specified performance range: −40 to +85 °C.
Operating-temperature stress range: −40 to +105 °C; storage: −40 to +125 °C. Do not extend the specified performance range to +105 °C.
Digital-pin input voltage
Use supply-compatible logic; do not connect 5 V pull-ups.
CLKIN, AUX_DA, AD0, FSYNC, INT, SCL, SDA: −0.5 V to VDD + 0.5 V.
REGOUT
Regulator-filter capacitor connection, not a system power rail.
−0.5 to +2 V.
CPOUT
Charge-pump capacitor connection, not a supply input.
−0.5 to +30 V, with the rating conditioned on 2.5 V ≤ VDD ≤ 3.6 V.
Body length and width each 3.90/4.00/4.10 mm, min/nom/max.
Terminal pitch
0.50 mm nominal.
Not a stress rating.
2. Pinout & Connections
Pin numbers below refer to the manufacturer's MPU-6050 QFN pin numbering. NC positions are grouped for readability; every peripheral terminal is accounted for. Pin identities and functions follow §7.1.
Table
Pin Number
Pin Name
Description
Best Practice
1
CLKIN
Optional external reference-clock input.
Tie to GND when unused.
2, 3, 4, 5
NC
Not internally connected.
Normally leave unconnected; the manufacturer permits use for PCB trace routing.
6
AUX_DA
Auxiliary I²C-master data for external sensors.
Route to an external sensor only if the auxiliary interface is used; it is not the host SDA pin. A manufacturer-specific unused-pin termination was not verified here.
7
AUX_CL
Auxiliary I²C-master clock for external sensors.
Route to an external sensor only if required; it is not the host SCL pin. A manufacturer-specific unused-pin termination was not verified here.
8
VLOGIC
Digital I/O supply.
For a 3.3 V MCU and 3.3 V VDD, connect to the same rail; bypass with 10 nF X7R.
9
AD0
Least-significant bit of the I²C address.
Tie low for 7-bit 0x68 or high for 0x69; do not leave floating.
10
REGOUT
Internal-regulator filter connection.
Connect a 100 nF X7R filter capacitor to GND; do not use this pin to power other circuitry.
11
FSYNC
Frame-synchronization digital input.
Tie to GND when unused.
12
INT
Interrupt output, supporting totem-pole or open-drain operation.
Connect to an MCU interrupt input if used. An open-drain configuration requires an external pull-up; 10 kΩ to VLOGIC is an engineering starting value, not a manufacturer-mandated value. Exact register encodings remain unverified in this guide.
13
VDD
Main power supply.
Use a regulated supply in the operating range and place a 100 nF X7R bypass to GND close to the pin.
14, 15, 16, 17
NC
Not internally connected.
Normally leave unconnected; PCB trace routing is permitted by the manufacturer.
18
GND
Power-supply ground.
Connect to a low-impedance ground plane and nearby capacitor returns.
19
RESV
Reserved.
Do not connect.
20
CPOUT
Charge-pump capacitor connection.
Connect a 2.2 nF, ±10%, 50 V X7R capacitor to GND.
21
RESV
Reserved.
Do not connect.
22
RESV
Reserved.
Do not connect.
23
SCL
Host I²C serial clock.
Connect to MCU SCL with an external pull-up to VLOGIC; size for bus capacitance and measured rise time.
24
SDA
Host I²C serial data.
Connect to MCU SDA with an external pull-up to VLOGIC; account for pull-ups already fitted elsewhere on the bus.
Exposed die pad
—
No electrical connection to the CMOS; not required for heat sinking.
Do not solder it to the PCB. Do not substitute the usual grounded-QFN thermal-pad practice.
3. Standard Application Circuit
MPU-6050 wiring for a 3.3 V microcontroller
Use one regulated 3.3 V rail for VDD and VLOGIC, and one shared GND. This is a practical choice within the verified supply ranges.
Install these four capacitors between their respective pins and GND, following the manufacturer's typical operating circuit and external-component BOM:
Table
Connection
Required reference value
Manufacturer reference
REGOUT, pin 10 → GND
100 nF, ±10%, X7R; reference voltage rating 2 V
§7.3 C1.
VDD, pin 13 → GND
100 nF, ±10%, X7R; reference voltage rating 4 V
§7.3 C2.
CPOUT, pin 20 → GND
2.2 nF, ±10%, X7R, 50 V
§7.3 C3. Do not replace this with a low-voltage bypass capacitor.
VLOGIC, pin 8 → GND
10 nF, ±10%, X7R; reference voltage rating 4 V
§7.3 C4, MPU-6050 only.
Engineering implementation advice: using 6.3 V or higher rated parts for the low-voltage capacitors is reasonable, provided the required effective capacitance is retained. Keep the CPOUT capacitor at 50 V or higher; do not treat CPOUT as equivalent to VDD. An additional 1 µF local supply capacitor can be useful for rail distribution, but it is an optional engineering addition, not a replacement for the four reference capacitors.
Connect host SDA to pin 24 and host SCL to pin 23. Fit a pull-up on each line to VLOGIC. 2.2 kΩ is a starting design choice for a short 3.3 V bus, not a guaranteed universal value: measure rise time at the selected bus speed and check low-level sink-current margins against all connected devices. Parallel pull-ups on multiple boards reduce the total resistance. Do not enable MCU pull-ups to a 5 V rail.
Tie AD0 to GND for address 0x68, or to the logic rail for 0x69; these are 7-bit addresses, not addresses already shifted to include the read/write bit. Tie unused CLKIN and FSYNC to GND. Leave reserved pins 19, 21, and 22 unconnected.
If INT is used, select its drive mode and polarity deliberately in firmware and match the MCU input configuration. INT configuration, interrupt latching/clearing, and trigger selection are controlled by the interrupt configuration register. Do not add an interrupt pull-up on the assumption that every IMU output is always open-drain.
Power-up and integration checks
Both supplies must ramp monotonically; VDD must rise from 10% to 90% of its final value within 100 ms and VLOGIC within 3 ms. Start VLOGIC no earlier than VDD and never allow VLOGIC to exceed VDD. A common supply simplifies the sequencing, but verify its actual ramp; a deliberately slow RC supply ramp can still violate these requirements.
Practical bring-up: check rail voltage and I²C waveforms, confirm an acknowledgement at the selected address, configure the intended sensing modes and scale factors, then verify stationary readings and orientation changes. Calibration, mounting-axis transforms, and filtering belong in the system firmware; an I²C acknowledgement alone is not a motion-sensor functional test.
Unverified firmware details: the separate register-map source remained pending after two bounded retrieval attempts. Exact INT_OPEN/INT_LEVEL bit encodings, PWR_MGMT_1 startup/sleep details, and WHO_AM_I expectations were therefore not verified and are intentionally not prescribed here. Consult the linked manufacturer register map before implementing those settings. No arbitrary power-up delay is claimed as a datasheet requirement.
4. PCB Layout & Routing Guidelines
Apply the MPU-6050 land pattern, not a generic grounded-QFN pattern. The package has 0.50 mm terminal pitch; the recommended I/O land dimensions include 0.35 mm land width and 0.80 mm land length for the shorter-pad positions, with 0.85 mm for the longer-pad positions. Use the complete drawing rather than isolated dimensions. The exposed die pad must not be soldered; omit its paste aperture and avoid a generic thermal-via array beneath it.
Minimize capacitor loops. Place each of the four reference capacitors next to its associated pin with short returns to the ground plane. Keep REGOUT and CPOUT connections local, away from digital clock traces. The required values and pin associations are given in §7.3. Placement recommendations here are engineering guidance, not additional numerical manufacturer spacing limits.
Route SDA/SCL as ordinary single-ended signals. They are not a differential pair and do not require pair-length matching. Keep them short, avoid long stubs, and separate them from switching nodes; confirm bus rise time after assembly. No fixed trace width is universally required for this low-current IMU; choose manufacturable widths that maintain low supply impedance. Use JLCPCB-compatible clearance and fine-pitch solder-mask rules for this user's fabrication target.
Protect measurement repeatability mechanically. As engineering practice, place the sensor on a mechanically stable region away from screw loads, board-flex zones, strong local heat sources, and avoidable vibration. Document its axis orientation on the PCB and in firmware. Do not introduce a heatsink or generic QFN thermal relief under the exposed die pad.
Check assembly outputs. Confirm pin-1 orientation, all 24 terminal positions, reserved-pin isolation, and the omitted center-pad paste aperture in the Gerbers and stencil data. This guide does not certify the current Flux footprint; the project context reports 16 pads, so reconcile that metadata with the manufacturer terminal map before fabrication rather than assuming a valid 24-terminal footprint.
5. Common Pitfalls / Things to Watch Out For
Treating the bare IC as a 5 V breakout module. VDD operates at 2.375–3.46 V, regardless of the higher absolute-maximum stress limit. Use correct VLOGIC pull-up levels, define AD0, and observe power sequencing; VLOGIC must never exceed VDD. An on-module regulator, when present, does not automatically provide I²C level shifting.
Applying generic QFN rules or omitting the unusual charge-pump capacitor. The exposed die pad must not be soldered. CPOUT needs the specified 2.2 nF, ±10%, 50 V X7R capacitor, not an arbitrary 100 nF low-voltage decoupler.
6. Popular Alternatives & Equivalents
No drop-in replacement from another manufacturer was verified. The following are functionally similar six-axis devices, not pin-compatible, footprint-compatible, or register-compatible MPU-6050 substitutes. Plan schematic, PCB, and firmware changes; verify the exact ordering code and current lifecycle before procurement.
Functionally similar only. Six-axis accelerometer/gyroscope in a 14-pin LGA, 2.5 × 3 mm, versus the MPU-6050 QFN.
Supports I²C and SPI; interface-select and pin assignments differ. Rewrite the driver and use its own reference circuit and land pattern. No exact usable Flux library entry was found in this search.
Functionally similar only. Six-axis IMU in a 14-pin LGA with nominal 2.5 × 3.0 × 0.83 mm geometry.
Use the Bosch-specific driver, startup procedure, and land pattern; MPU-6050 firmware is not reusable unchanged. Configuration-file initialization details were not verified in this research, so they are not specified here.
For completeness, TDK's own recommended alternate is ICM-42670-P, but it is from the same manufacturer and TDK explicitly does not guarantee interchangeability (MPU-6050 lifecycle page). It is not counted as an independently verified cross-manufacturer drop-in.
7. Sourcing & Purchasing Guide
Research date: October 7, 2026. Distributor listings and packaging information do not guarantee stock or a purchasable offer.
Table
Attribute
Details
Primary Distributors
DigiKey and Component Distributors (CDI) have identified MPU-6050 listings; DigiKey reports obsolete and CDI reports discontinued. A currently fulfillable authorized-stock offer was not verified. Check TDK's sales/distributor channels before relying on residual stock.
Packaging Options
DigiKey lists Tape & Reel (TR), order code 1428-1007-2-ND, and Cut Tape (CT), 1428-1007-1-ND. These are distributor order codes; the manufacturer's listed MPN remains MPU-6050 (DigiKey listing).
Standard MOQ
DigiKey lists cut-tape MOQ 1 and full-reel quantity 5,000; availability of either is not confirmed (DigiKey). TDK specifies 5,000 pcs, embossed plastic tape, 330 mm reel, 12 mm tape width (TDK). Do not assume a generic 3,000-piece reel.
Lifecycle
Obsolete. Manufacturer EOL notice PCN-000614, July 23, 2023, lists last-time buy January 31, 2024, and last-time ship December 31, 2024 (manufacturer notice hosted by DigiKey).
Sourcing Advice
Prefer franchised/authorized distribution with lot traceability. Non-authorized marketplace stock creates counterfeit, reclaimed-part, and storage-history risks; request original labels, date/lot codes, and traceability. Confirm exact MPN, package, packing, moisture handling, and whether the quote is for a bare IC or a module. Do not assume suffixes or similarly named parts are equivalent. For a new production BOM, budget an IMU redesign instead of depending on obsolete stock.
Sources
Manufacturer-authored technical documents remain primary sources even when an accessible copy is hosted by a distributor or university. Public links below identify the documents; inline evidence citations identify the specific technical claims used above.
InvenSense, MPU-6000/MPU-6050 Product Specification, document PS-MPU-6000A-00, Revision 3.4, August 19, 2013. Manufacturer URL did not serve an accessible PDF to this research session; the verified technical extraction used the CDI-hosted manufacturer PDF, especially §§6.3–6.9, 7.1–7.4, 9, and 11.2–11.4.
InvenSense, MPU-6000 and MPU-6050 Register Map and Descriptions, RM-MPU-6000A-00, Revision 4.2, August 19, 2013. Accessible source link. Register-level extraction remained pending; exact settings are explicitly unverified above.
Bosch Sensortec, BMI270 datasheet, BST-BMI270-DS000-08, Revision 1.6, March 2026, manufacturer PDF. Basic function and package verified; initialization details were not verified.
DigiKey, MPU-6050 product listing, distributor source; accessed October 7, 2026. Used for distributor order codes, packing options, MOQ, and listed status, not as the authority for circuit design.
Component Distributors, MPU-6050 listing, distributor source; accessed October 7, 2026.