Part Review and Datasheet Verification


Completed the part review and created Part Review: IS66WVH64M8DBLL-166B1LI-TR. Key issue: for this 3.0V BLL part, datasheet notes say ball B1 is RFU, but the project currently labels B1 as CK#; pin types/descriptions are also mostly unspecified.
Open items:
  • Confirm whether to correct B1 from CK# to RFU/no-connect.
  • Populate terminal pin types/descriptions from the datasheet.
  • Prefer the official ISSI datasheet URL if part-level metadata editing is available.
Suggested next steps:
  1. Fix the B1 terminal mismatch.
  2. Add datasheet-based pin descriptions and pin types.
  3. Re-check detailed footprint pad pitch/geometry before publishing.
Populate all terminal pin types and descriptions from the ISSI datasheet. and fix B1 mismatch
I’ll update the terminal metadata from the ISSI datasheet and correct B1 so the 3.0V BLL variant treats it as RFU/no-connect.
I confirmed the current terminal list: B1 is still labeled CK#, and all 24 terminals need datasheet-derived pin metadata.
Updated all 24 terminal pin types and descriptions from the ISSI datasheet, using Flux-standard pin type values. Fixed the B1 mismatch by renaming CK# to RFU_6 and marking it Not Connected with a BLL-specific RFU description.
Open items:
  • None for the requested metadata update.
Suggested next steps:
  1. Verify the rendered symbol still has the desired visual grouping after CK# → RFU_6.
  2. Re-check the footprint pad geometry/pitch before publishing the part.
Verify symbol and footprint
Check visual grouping
Inspect footprint geometry
Run ERC and DRC
Update review document

Name
Pin #
Type
Part Type
Pin Description
Terminal Order
RFU_1
A2
Not Connected
Terminal
Reserved for Future Use; may or may not be internally connected. Leave unconnected and unused by PCB routing channel for future compatibility.
CS#
A3
Input
Terminal
Chip Select, active-low slave input. Bus transactions are initiated by HIGH-to-LOW transition and terminated by LOW-to-HIGH transition.
RESET#
A4
Input
Terminal
Hardware reset input with internal weak pull-up. When LOW, device self-initializes and returns to standby; RWDS and DQ[7:0] are High-Z.
RFU_2
A5
Not Connected
Terminal
Reserved for Future Use; may or may not be internally connected. Leave unconnected and unused by PCB routing channel for future compatibility.
RFU_6
B1
Not Connected
Terminal
Reserved for Future Use on the 3.0V BLL device at ball B1; leave unconnected and unused by PCB routing channel for future compatibility.
CK
B2
Input
Terminal
Clock input for HyperBus command, address, and data timing. For the 3.0V BLL device this is the single-ended clock input.
VSS
B3
Ground
Terminal
Array/core ground supply reference.
VCC
B4
Power In
Terminal
Array/core power supply. For BLL variant, operate VCC at 2.7V to 3.6V; VCC must be the same voltage as VCCQ.
RFU_3
B5
Not Connected
Terminal
Reserved for Future Use; may or may not be internally connected. Leave unconnected and unused by PCB routing channel for future compatibility.
VSSQ_1
C1
Ground
Terminal
Input/output ground supply reference.
RFU_4
C2
Not Connected
Terminal
Reserved for Future Use; may or may not be internally connected. Leave unconnected and unused by PCB routing channel for future compatibility.
RWDS
C3
Bi-Directional
Terminal
Read-Write Data Strobe. Output during read transfers and latency indication; input during write transfers as write data mask/strobe.
DQ2
C4
Bi-Directional
Terminal
HyperBus bidirectional data bit 2; carries command, address, and data during read/write transactions.
RFU_5
C5
Not Connected
Terminal
Reserved for Future Use; may or may not be internally connected. Leave unconnected and unused by PCB routing channel for future compatibility.
VCCQ_1
D1
Power In
Terminal
Input/output power supply. For BLL variant, operate VCCQ at 2.7V to 3.6V; VCCQ must be the same voltage as VCC.
DQ1
D2
Bi-Directional
Terminal
HyperBus bidirectional data bit 1; carries command, address, and data during read/write transactions.
DQ0
D3
Bi-Directional
Terminal
HyperBus bidirectional data bit 0; carries command, address, and data during read/write transactions.
DQ3
D4
Bi-Directional
Terminal
HyperBus bidirectional data bit 3; carries command, address, and data during read/write transactions.
DQ4
D5
Bi-Directional
Terminal
HyperBus bidirectional data bit 4; carries command, address, and data during read/write transactions.
DQ7
E1
Bi-Directional
Terminal
HyperBus bidirectional data bit 7; carries command, address, and data during read/write transactions.
DQ6
E2
Bi-Directional
Terminal
HyperBus bidirectional data bit 6; carries command, address, and data during read/write transactions.
DQ5
E3
Bi-Directional
Terminal
HyperBus bidirectional data bit 5; carries command, address, and data during read/write transactions.
VCCQ_2
E4
Power In
Terminal
Input/output power supply. For BLL variant, operate VCCQ at 2.7V to 3.6V; VCCQ must be the same voltage as VCC.

IS66WVH64M8DBLL-166B1LI