ESP32-S3 Module Design Discussion
Worked for 4 mins 20 sec
我已經幫你完成前期選型同邊界整理，未正式落原理圖，因為本輪資源已用完。
已完成嘅工作：
- 讀咗現有主控板規格，確認顯示模組接口已定為 5-pin：5V / GND / I2C_SDA / I2C_SCL / DET/IRQ
- 確認顯示模組應該係 本地 MCU + 本地 5V→3.3V + 本地背光 PWM
- 做咗初步元件研究，得到一個可落地方向：
- MCU：ESP32-S3-WROOM-1-N8R8
- 3.3V buck：AP63203WU-7，固定 3.3V、2A、供應穩妥，較之前搵到嘅 PAM2305 更合適
- 背光 driver：TPS61165DBV/DBVT，5V 輸入、支援 PWM dimming，適合 TFT 背光
- LCD 連接：暫時最合理係 40-pin 0.5mm FFC，庫內有 MIKROE-1425 可做面板連接器
- 同時確認咗一個常見 4.3" 面板方向：
- 480×272 RGB TFT，40-pin
- 背光功耗搜尋結果顯示常見值大約 0.65W~0.8W，有啲型號背光 LED 可能需要高於 5V 嘅串燈驅動，所以先保留 boost LED driver 方向係正確
而家最重要嘅未完成項目：
- 鎖定實際 4.3" LCD 型號 / datasheet
- 呢一步會直接決定：
- RGB pinout
- 背光 LED 電壓 / 電流
- 是否要 DE/HSYNC/VSYNC/DCLK
- 是否帶 touch
- 根據已鎖定面板：
- 完成功耗預算
- 畫顯示模組原理圖
- 補齊 ESP32-S3 boot/reset、去耦、panel connector、backlight driver、pogo 接口
- 做 ERC 清錯
- 更新規格同 firmware starter
我而家最建議你下一步直接定其中一個方向：
- 方案 A：我幫你直接以 4.3" 480×272 RGB 40-pin 面板作為預設假設落圖
- 方案 B：你提供你想用嘅 4.3" LCD 型號 / 連結 / datasheet，我再按實物精準落圖
如果你想我最快繼續，最實際係揀 方案 A，我會以：
ESP32-S3-WROOM-1-N8R8 + AP63203WU-7 + TPS61165 + 40-pin RGB TFT
作為第一版顯示模組原理圖基線。
選方案 A
準備 LCD 型號
搜尋 TFT 面板
加入核心元件
建立規格文件
Refine this doc
Ask about this doc
Project Specification — ESP32-S3 Modular Host
1. Purpose
Design a USB-C powered ESP32-S3 host controller board for a desktop product. The board provides Wi-Fi/BLE connectivity, local control, indicator LEDs, and four magnetic pogo-pin module ports. The first target external module class is a 4.3 inch TFT IPS display module with its own local MCU, local 5V→3.3V regulation, and local PWM backlight control.
2. User Requirements Captured
Table
| Category | Requirement | Implementation Direction |
|---|---|---|
| Main MCU | ESP32-S3 | Use an ESP32-S3 module to avoid custom RF design and include onboard flash/PSRAM where available. |
| Power Input | USB-C PD input | Add a PD-capable USB-C sink controller so the product is PD-aware rather than CC-resistor-only. Initial host implementation keeps a 5V internal system rail. |
| Host Regulation | 5V to 3.3V | Use a 3.3V buck regulator sized for the ESP32-S3 host logic only; include required input/output capacitors. |
| Storage | Flash / PSRAM | Use ESP32-S3-WROOM-1-N8R8 with integrated flash and PSRAM. |
| Module Interface | 4 magnetic pogo-pin ports | Four external module connectors using protected 5V, GND, shared I2C, and one per-port detect/interrupt line. |
| Human Interface | Setup button, Reset button, LEDs | BOOT/setup button on GPIO0, reset button on EN/CHIP_PU, power/status indicators. |
| Display Module | 4.3 inch TFT IPS LCD | Treat as an external smart module. Display module has its own ESP32/STM32 controller, 5V input, local 3.3V regulation, and PWM backlight control. |
| Display Module Interface | 5-pin magnetic pogo pin | Use 5 pins for 5V, GND, I2C SDA/SCL, and one module detect/IRQ line. |
| Display Module Enclosure | ABS / PC + desktop stand | Mechanical requirement recorded for later enclosure/PCB outline work. |
3. Design Assumptions
- Product is USB-powered only; no battery charging is included in this revision.
- The host board exposes protected 5V on each module port so display modules can run their own 5V→3.3V regulator and LCD/backlight supply locally.
- Module signal pins remain 3.3V logic only. Any module with 5V logic must include level shifting on the module side.
- A display module may draw substantially more current than a sensor module; initial port budget remains conservative until the exact LCD/backlight module current is known.
- Default manufacturing style is compact SMD unless user requests hand-solderable parts.
- ESP32-S3 native USB will be used for programming and USB-serial/JTAG; no external USB-UART bridge is planned.
- Backlight PWM is generated on the display module locally. The host sends brightness/state commands over I2C rather than dedicating a host PWM pin on the pogo connector.
4. Implemented Electrical Architecture
- USB-C connector → raw VBUS entry → PTC fuse + TVS protection → protected 5V VBUS rail.
- Raw VBUS also powers an STUSB4500 USB-C PD sink controller on the receptacle side.
- STUSB4500 is wired in minimum fixed-PDO / standalone mode:
- CC1 and CC2 connected to the receptacle CC pins.
- CC1DB and CC2DB tied to CC1 and CC2 for dead-battery support.
- VDD powered from raw VBUS.
- VREG_1V2 and VREG_2V7 each have 1µF decoupling.
- ADDR0 and ADDR1 tied to GND because no I2C control interface is used in this revision.
- VSYS tied to GND per datasheet guidance for VDD-only standalone operation.
- ATTACH exported to the ESP32 through a 10k pull-up to 3.3V.
- VBUS_VS_DISCH connected to raw VBUS through a 470Ω series resistor per datasheet guidance.
- VBUS_EN_SNK given a weak pull-up so the pin is in a defined state and reserved for later power-path control if needed.
- Protected 5V VBUS rail feeds the host 3.3V buck regulator and the four module port power pins.
- 3.3V buck regulator powers only ESP32-S3 host logic, I2C pull-ups, and host-side LEDs.
- USB D+/D- from USB-C route to ESP32-S3 native USB pins with ESD protection.
- ESP32-S3 EN/CHIP_PU has 10kΩ pull-up and 1µF reset delay capacitor; reset button pulls EN low.
- GPIO0 has BOOT/setup button to GND for firmware download mode.
- Shared I2C bus exposes SDA/SCL to all four module ports with one 4.7k pull-up pair near the MCU.
- Each module port gets protected 5V, GND, SDA, SCL, and one detect/interrupt GPIO.
5. Module Port Pinout
Table
| Pin | Net | Purpose |
|---|---|---|
| 1 | VBUS | Protected 5V module power input |
| 2 | GND | Ground return |
| 3 | I2C_SDA | Shared 3.3V I2C data |
| 4 | I2C_SCL | Shared 3.3V I2C clock |
| 5 | PORTx_DET | Module detect or interrupt |
This 5-pin definition replaces the earlier 6-pin concept. The removed spare GPIO/backlight line is intentionally dropped because display-module backlight PWM now lives on the module board and is commanded over I2C.
6. Current Host Pin Map Relevant to Modules and USB-C
Table
| Function | ESP32-S3 GPIO | Net |
|---|---|---|
| Port 1 detect / IRQ | 4 | PORT1_DET |
| Port 2 detect / IRQ | 5 | PORT2_DET |
| Port 3 detect / IRQ | 6 | PORT3_DET |
| Port 4 detect / IRQ | 7 | PORT4_DET |
| I2C SDA | 8 | I2C_SDA |
| I2C SCL | 9 | I2C_SCL |
| USB-C attach detect | 10 | USB_C_ATTACH |
| USB D- | 19 | USB_D_N |
| USB D+ | 20 | USB_D_P |
| Status LED | 21 | LED_STATUS |
| Activity LED | 14 | LED_ACTIVITY |
GPIO11, GPIO12, and GPIO13 are intentionally left unused in this revision.
7. Revised Power Budget
Table
| Rail / Source | Load | Typical | Peak | Notes |
|---|---|---|---|---|
| 3.3V host rail | ESP32-S3 Wi-Fi/BLE module | 240mA | 500mA | Peak covers Wi-Fi transmit bursts. |
| 3.3V host rail | LEDs and host support logic | 10mA | 30mA | Status LEDs with conservative current limiting. |
| 3.3V host rail | I2C pull-ups / leakage | <5mA | <10mA | Small compared with MCU load. |
| 3.3V host rail total | Host logic only | ~255mA | ~540mA | ST1S10 3A buck has ample current margin. |
| 5V VBUS | Four external module ports | TBD | application-dependent | Exact 4.3 inch TFT module current still needs confirmation from the selected display module design. |
| 5V VBUS | Host buck input equivalent | ~190mA | ~450mA | Approximate at 85% efficiency for 3.3V rail. |
Important: the current revision is now PD-aware because it includes an STUSB4500 sink controller, but it still keeps a 5V system rail. This means the board is prepared for USB-C PD-capable adapters while the downstream module power architecture remains 5V. A later revision may still choose to negotiate a higher-voltage PDO and add a dedicated 5V high-current buck stage if the final four-display power budget demands it.
8. Display Module Boundary
The 4.3 inch TFT IPS display module is treated as a separate smart module, not directly driven by the host ESP32-S3. The module should include:
- Display controller MCU: ESP32 or STM32.
- Local 5V→3.3V regulator for MCU/LCD logic.
- TFT LCD interface local to the module board.
- Local PWM backlight driver controlled by the module MCU.
- Pogo interface back to host for power, I2C command/status, and detect/IRQ.
- ABS/PC enclosure and desktop stand mechanical design in a later phase.
9. Validation Gates
- Confirm the final 4.3 inch display-module current before freezing the USB-C adapter requirement.
- If worst-case total module current approaches or exceeds comfortable 5V / 3A operation, revise the power path to a higher-voltage PD contract plus dedicated 5V high-current buck.
- Keep module signal lines at 3.3V logic only.
- Run ERC after every interface or power change; mark intentionally unused pins as no-connect.
- Do not proceed to PCB layout until the schematic and system power strategy are confirmed.
10. Open Items
- Exact magnetic pogo connector mechanical part number.
- Exact 4.3 inch TFT LCD module stack and display-module MCU selection.
- Exact display-module peak current and backlight current.
- Whether the final product should negotiate only 5V from PD-capable adapters or move to a higher-voltage PDO with an added 5V high-current buck stage.
- Final enclosure dimensions and board outline.
1. Purpose
2. User Requirements Captured
3. Design Assumptions
4. Implemented Electrical Architecture
5. Module Port Pinout
6. Current Host Pin Map Relevant to Modules and USB-C
7. Revised Power Budget
8. Display Module Boundary
9. Validation Gates
10. Open Items
