Schematic Design Assistance

Thought for 42 sec

Read-only verification completed; I did not modify the schematic.

Table

ESP32-C3 pin	Net name	Connected component pins on that net
GPIO3	`IRQ_SHARED_GPIO3`	`U1:GPIO3`, `U2:IRQ`, `U5:~{INT}`
GPIO4	`I2C_SDA_GPIO4`	`U1:GPIO4`, `U2:SDA`, `U3:SDA`, `U4:SDA_OUT`, `U5:SDA`, `OLED1:SDA`, `R6:P2`
GPIO5	`I2C_SCL_GPIO5`	`U1:GPIO5`, `U2:SCL`, `U3:SCL`, `U4:SCL_OUT`, `U5:SCL`, `OLED1:SCL`, `R7:P2`
GPIO6	`RGB_DATA_GPIO6`	`U1:GPIO6`, `R21:P1`
GPIO7	`FP_TOUCHOUT_GPIO7`	`U1:GPIO7`, `J1:8`
GPIO8	`STATUS_LED_GPIO8`	`U1:GPIO8`
GPIO10	`GPIO10_SPARE_TP`	`U1:GPIO10`
GPIO20	`FP_UART_TX_TO_ESP_RX_GPIO20`	`U1:GPIO20`, `J1:5`
GPIO21	`FP_UART_RX_FROM_ESP_TX_GPIO21`	`U1:GPIO21`, `J1:4`
3V3	`3V3`	`U1:3V3`, `U2:VDD`, `U2:ADDR`, `U3:VDD`, `U3:VDD_NC`, `U3:EN`, `U4:3.3v power`, `U4:RESET`, `U5:VCC`, `J1:6`, `J1:7`, `LED1:VDD`, `LED2:VDD`, `LED3:VDD`, `LED4:VDD`, `OLED1:5V`, `R6:P1`, `R7:P1`, `R22:P1`, `R23:P1`, `R24:P1`, `R25:P1`, `R26:P1`, `C5:P1`, `C7:P1`, `C9:P1`, `C10:P1`, `C11:P1`, `C12:P1`, `C13:P1`, `C14:P1`
GND	`GND`	`U1:GND`, `U2:VSS`, `U3:GND`, `U4:SPGND`, `U5:GND`, `U5:A0`, `U5:A1`, `U5:A2`, `J1:1`, `J1:2`, `J1:9`, `J1:10`, `J1:11`, `J1:12`, `LED1:GND`, `LED2:GND`, `LED3:GND`, `LED4:GND`, `OLED1:GND`, `SW1:P2`, `SW2:P2`, `SW3:P2`, `SW4:P2`, `R8:P2`, `C5:P2`, `C6:P2`, `C7:P2`, `C8:P2`, `C9:P2`, `C10:P2`, `C11:P2`, `C12:P2`, `C13:P2`, `C14:P2`

Confirmations:

✅ Fingerprint FPC J1:5 UART_TX connects to ESP GPIO20; J1:4 UART_RX connects to ESP GPIO21.
⚠️ Fingerprint OTP J1:3 is isolated from MCU/other circuitry, but current netlist shows only J1:3 on FP_OTP_TP_ONLY; I do not see a test pad connected.
✅ MPR121 ADDR is tied to 3V3.
⚠️ BNO055 ADR cannot be verified from this selected BNO055 sublayout; no ADR pin is exposed. Address-low/open is therefore an assumption, not netlist-confirmed.
⚠️ MPR121 IRQ and TCA9534A ~INT share IRQ_SHARED_GPIO3 to ESP GPIO3, but I do not see an external pullup on that IRQ net.

yari4embedded

Please fix exactly these two issues and nothing else: 1) Add a test pad component on net FP_OTP_TP_ONLY so fingerprint OTP J1:3 has an actual test pad, as originally specified. 2) Add a 10 kOhm pullup resistor from net IRQ_SHARED_GPIO3 to 3V3, since MPR121 IRQ and TCA9534A INT are open-drain and the line currently has no pullup. Do not change any GPIO assignments, nets, or other components. BNO055 ADR is fine as-is (module handles addressing internally). After the fixes, re-run ERC and confirm both changes.

Thought for 6 sec

flux

I’ll make only those two schematic fixes: add an OTP test pad to FP_OTP_TP_ONLY and add a 10 kΩ pullup from IRQ_SHARED_GPIO3 to 3V3, then rerun ERC.

Worked for 1 min 42 sec

flux

Done — made only the two requested schematic changes.

Confirmed:

Added TP37 to fingerprint OTP net FP_OTP_TP_ONLY; it is associated with J1:3 / OTP test-only connectivity.
Added R31 = 10kΩ pullup:
- R31:P1 → 3V3
- R31:P2 → IRQ_SHARED_GPIO3
- IRQ_SHARED_GPIO3 contains U1:GPIO3, U2:IRQ, U5:~{INT}, and R31:P2.

ERC re-run result: no ERROR, WARNING, or OPEN checks returned.

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