Schematic Wiring Status — Project Aura
Status
Core schematic wiring and the main support-passive pass are complete. A focused electrical/passive review now reports no open warnings for floating pins, no-connects, power pins, single-pin nets, shorted components, undriven nets, decoupling caps, capacitor voltage rating, or pull-up/pull-down checks.
Remaining work is now primarily schematic readability cleanup and PCB/layout-stage validation: RF physical placement/keepout, controlled-impedance routing, VNA antenna tuning, and final audio/power validation before manufacturing.
Major Correction Made During Wiring
The 7-conductor flex interpretation was revised after the analog ICS-40730 hook microphones were added.
Corrected placement assumption:
- Hook side: nRF5340, nPM1100, TLV62568 3V0 buck, flash, USB-C, battery connector, two ICS-40730 analog microphones, CS47L63, CS47 1V8/1V2 regulators.
- IEM side: three MAX98360A amplifiers and the three Knowles BA receivers.
Corrected 7-conductor flex signals:
- VSYS_AMP
- GND
- GND_SHIELD
- TDM_BCLK
- TDM_FSYNC
- TDM_DOUT
- AMP_EN
This preserves the 7-conductor constraint while avoiding the impossible case of sending two analog differential microphones across the same limited flex.
Wired Blocks
Power / Charging
- USB-C VBUS, CC1/CC2 sink pull-downs, USB D+/D− to nRF5340 and nPM1100 port-detect pins.
- JST-PH battery connector through BAT54 prototype Schottky protection to nPM1100 VBAT.
- nPM1100 VSYS to MAX98360A supply branch and TLV62568 VIN.
- nPM1100 charger configuration: 11 kΩ ICHG resistor for ~50 mA charge current, ISET low for USB detection/default 100 mA behavior, VTERMSET high for 4.2 V termination, MODE low, SHPHLD/SHPACT low, fixed 10 kΩ NTC resistor for prototype no-thermistor case, and DEC capacitor populated.
- nPM1100 VOUTB/SW are intentionally unused because the main 3V0 rail is provided by the external TLV62568 buck.
- TLV62568 3V0 buck: 2.2 uH inductor, 4.7 uF input cap, 10 uF output cap, 400k/100k feedback divider, 6.8 pF feed-forward cap.
- TPS79318 1V8_A rail for CS47L63 VDD_A.
- TLV70012 1V2_D rail for CS47L63 VDD_D.
Compute / Storage / USB
- nRF5340 VDD pins tied to 3V0; grounds tied to GND.
- nRF5340 Nordic reference DEC/DC-DC support added: DECR/DECRF, DECD, DECN, DECA, and DECUSB networks with reference values.
- SWDIO, SWDCLK, nRESET, GND, and 3V0 test pads added.
- W25Q01JV QSPI flash wired to nRF5340 P0.13–P0.18 QSPI pins.
- USB-C D+/D− wired to nRF5340 USB and nPM1100 USB detection.
- 32 MHz MP06003 crystal wired to nRF5340 XC1/XC2 with 12 pF load capacitors.
Audio / Control
- nRF5340 to CS47L63 control: I2C on P1.02/P1.03 with 4.7k pull-ups to 3V0.
- nRF5340 to CS47L63 stereo audio: I2S BCLK/FSYNC/DOUT to CS47L63 ASP2 input.
- CS47L63 VREF1_FILT and VREF2_FILT capacitors added per datasheet.
- CS47L63 VDD_LDO is intentionally unused because the external ICS-40730 MEMS microphones are powered from 3V0; per datasheet, VDD_LDO and LDO_FILT are tied to GND.
- CS47L63 to MAX98360A amps: ASP1 TDM BCLK/FSYNC/DOUT bus.
- MAX98360A TDM slot straps: U3 slot 0, U4 slot 1, U5 slot 2 by leaving U5 GAIN_SLOT open.
- AMP_EN from nRF5340 P0.25 to all MAX98360A EN pins and flex AMP_EN, with 100k pulldown default-off.
- MAX98360A outputs wired to WBFK, CI, and TWFK BA receiver terminals.
- ICS-40730 microphones now include local 0.1 uF VDD decoupling and 2.2 uF series DC-blocking capacitors on each differential output before the CS47L63 analog inputs.
RF
- Replaced the temporary direct nRF5340 ANT-to-antenna feed with a tunable RF matching footprint.
- Added L4 as the initial 1.5 nH series matching element based on Johanson 2450AT42E010B evaluation-board guidance.
- Added C30/C31 as optional DNP 0201 C0G/NP0 shunt tuning pads on the nRF side and antenna side of the series element.
- Marked RF_NRF_2G4 and RF_ANT_2G4 as 50 Ω controlled-impedance high-speed nets.
- Final component values still require final PCB geometry, antenna placement, and VNA tuning; Johanson notes that client PCB matching values will differ from evaluation-board values.
Latest Focused ERC Result
Focused review types checked:
- Floating pins
- No-connect issues
- Power pins
- Single-pin nets
- Pin-to-pin issues
- Shorted components
- Undriven nets
- Decoupling caps
- Pull-up / pull-down checks
- Capacitor voltage rating
Result: no open warnings or errors returned for those focused electrical/passive categories as of 2026-07-17.
Remaining Work Before Layout
- Clean up schematic readability: many auto-generated portals/wires are visually dense and can trigger schematic collision/readability warnings.
- During PCB setup, place the Johanson antenna and L4/C30/C31 matching network exactly per RF layout constraints, with short 50 Ω CPWG feed and appropriate ground/keepout behavior.
- VNA-tune the RF matching network on the final board; L4/C30/C31 values are starting/tuning placeholders, not production-final values.
- Verify MAX98360A logic thresholds with VSYS supply and 3V0 TDM input signals.
- Replace BAT54 Schottky with ideal-diode MOSFET protection if voltage drop/headroom is unacceptable.
- Add current-measurement jumpers or explicit test points for VSYS, 3V0, 1V8_A, 1V2_D, and amp supply if measurement priority is high.
- Confirm nRF5340 VDDH/DCCH regulator-mode choice against Nordic reference layout before final PCB layout.
Latest Change Note
2026-07-17: Added ICS-40730 microphone AC-coupling and local decoupling, tied unused CS47L63 LDO pins per datasheet, added the RF matching/tuning footprint, marked RF nets as 50 Ω, and re-ran focused electrical/passive ERC clean.