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create a high level mermaid block diagram of this project. Include key component...

@copilot create a high level mermaid block diagram of this project. Include key component's manufacturer part number in each block whenever possible.
2y
Sure! Let's create a high-level block diagram for the FT4232HL-REEL USB UART bridge project using the Mermaid syntax.

Diagram


JTAG Clock EEPROM Suspend Bus A Bus B Bus C Bus D USB_Pins Control Pins USB Connector FT4232HL-REEL<br>USB to UART Bridge VCCIO VCORE VPHY VPLL VREGIN VREGOUT AGND GND GND0 GND1 GND2 GND3 Bus Control ADBUS7 BDBUS0 CDBUS0 DDBUS0 OSCO OSCI EEDATA EECLK EECS ~SUSPEND ~PWREN ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7 CDBUS0 CDBUS1 CDBUS2 CDBUS3 CDBUS4 CDBUS5 CDBUS6 CDBUS7 DDBUS0 DDBUS1 DDBUS2 DDBUS3 DDBUS4 DDBUS5 DDBUS6 DDBUS7 DP DM ~RESET TEST REF
This diagram includes the USB connector, the FT4232HL-REEL USB to UART Bridge IC, and various critical connectors and buses that the IC interfaces with. Key power and ground connections are also shown. You can always further refine this diagram based on additional requirements or specific interconnections among the components involved in your project.
2y
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2
Name
Pin #
Type
Section
Pin Group
Orientation
Order
Sub-symbol
Terminal Type
GND
1
Unspecified
powerIn
OSCI
2
Unspecified
INPUT
OSCO
3
Unspecified
output
VPHY
4
Unspecified
powerIn
GND
5
Unspecified
powerIn
REF
6
Unspecified
INPUT
DM
7
Unspecified
bidi
DP
8
Unspecified
bidi
VPLL
9
Unspecified
powerIn
AGND
10
Unspecified
powerIn
GND
11
Unspecified
powerIn
VCORE
12
Unspecified
powerIn
TEST
13
Unspecified
INPUT
~RESET
14
Unspecified
INPUT
GND
15
Unspecified
powerIn
ADBUS0
16
Unspecified
bidi
ADBUS1
17
Unspecified
bidi
ADBUS2
18
Unspecified
bidi
ADBUS3
19
Unspecified
bidi
VCCIO
20
Unspecified
powerIn
ADBUS4
21
Unspecified
bidi
ADBUS5
22
Unspecified
bidi
ADBUS6
23
Unspecified
bidi

FT4232HL-REEL