I’ll inspect the schematic, connectivity, and component values, then create a detailed project walkthrough covering power, sensing, ESP32 behavior, indicators, programming, and expected operating sequence.
In short: a single AA battery passes through PMOS reverse-polarity protection and a TPS613221A boost converter to produce 3.3 V. The ESP32-C3 monitors a magnet-operated reed switch, wakes when the door/window changes state, reports the event over WiFi or BLE, briefly uses the RGB LED for status, then returns to deep sleep. The project file includes the complete power path, GPIO mapping, reed-filter circuit, programming process, PCB implementation, firmware sequence, trade-offs, and current design risks.
Updated: 2026-06-30. This document reflects the current project implementation: an ESP32-C3-MINI-1-N4 based battery door/window sensor powered from a single AA cell through a TPS613221A 3.3 V boost regulator, with reed-switch sensing, RGB status indication, BOOT/EN/USER controls, a 6-pin programming header, polarity protection, test points, and a compact 2-layer PCB layout.
Purpose and Real-World Use
This board is a compact wireless contact sensor for detecting whether a door, window, cabinet, drawer, or enclosure is open or closed. A magnet mounted on the moving part aligns with the reed switch when closed; when the magnet moves away, the reed state changes and wakes or alerts the ESP32-C3 firmware.
Typical applications:
Door/window open/closed detection
Cabinet, drawer, mailbox, or enclosure tamper sensing
Smart-home automation triggers
Low-power battery wireless sensor nodes
Security/event reporting over WiFi or BLE-supported firmware
Current High-Level Architecture
Diagram
Main Components
Table
Function
Designator(s)
Current part / value
Notes
Wireless MCU module
ESP1
ESP32-C3-MINI-1-N4
Main MCU and 2.4 GHz wireless module.
Battery holder
BT1
BH-AA-A1AJ020
Single AA cell holder.
Reverse-polarity / input protection
Q1
DMG2305UX-7
P-channel MOSFET at battery input path.
Boost regulator
IC1
TPS613221ADBVR
Generates the 3.3 V system rail.
Boost inductor
L2
DFE252012F-2R2M=P2, 2.2 uH
Connected between input path and IC1 SW.
Reed magnetic sensor
REED1
Littelfuse 59170-1-S-00-D
Detects magnet proximity.
RGB status LED
LED1
Everlight 19-237/R6GHBHC-A04/2T
Common-anode RGB status indicator.
User / boot / reset buttons
USER, BOOT, EN
PTS815 SMD tact switches
Local interaction, boot mode, reset/enable.
Programming header
J1
1x6 2.54 mm vertical header, A2541WV-6P
UART programming/debug and control access.
Test points
2, 3, 7, 8, 10, 18_USB_DN, 19_USB_DP
1.8 mm test pads
Bring-up/probing access.
Power Architecture
The power path is:
BT1 AA cell positive feeds the BAT+ net.
Q1 DMG2305UX-7 provides input polarity-protection behavior before the boost converter input path.
IC1 TPS613221ADBVR + L2 2.2 uH boost the AA cell voltage to the regulated VOUT rail.
VOUT is the board’s 3.3 V rail and powers ESP1, LED1 anode, pull-ups, bias resistors, J1 pin 1, and output capacitance.
GND is the shared return for the battery, regulator, MCU, switches, reed sensor, LED, and header.
Power Support Components
Table
Function
Components
Current values / notes
Input bulk capacitor
C2
22 uF on the protected boost input path.
Boost output bulk capacitors
C4, C8
22 uF each on VOUT.
Local 3.3 V decoupling
C7
1 uF on VOUT.
Small-signal / switch filtering
C1, C3, C5, C6
0.01 uF capacitors for reed/BOOT/EN/USER related nodes.
Regulator inductor
L2
2.2 uH Murata DFE252012F-2R2M=P2.
Functional Subsystems
1. ESP32-C3 Wireless Controller
ESP1: ESP32-C3-MINI-1-N4 module.
Supply:ESP1:3V3 is connected to VOUT; all ESP1 GND pins are tied to the common GND net.
Role: Reads the reed input, handles wake/report/sleep firmware behavior, drives the RGB LED, and communicates through WiFi or BLE-capable ESP32-C3 firmware.
Programming/debug: UART0 is brought to J1:
J1 pin 2: ESP_TX / ESP1:TXD0
J1 pin 3: ESP_RX / ESP1:RXD0
J1 pin 4: BOOT / ESP1:IO9
J1 pin 5: ESP_RST / ESP1:EN
J1 pin 1: 3.3 V / VOUT
J1 pin 6: GND
2. Reed Switch Door/Window Input
REED1: Littelfuse 59170-1-S-00-D magnetic reed sensor.
REED1 pin 2 connects to the reed sense node with R2, R6, and C1.
R2 pulls the reed node up to VOUT.
C1 filters the reed node to GND.
R6 is the series resistor from the reed/filter node toward the MCU side.
Design intent: The reed switch consumes essentially no steady-state current except the high-value pull-up path, while the RC network provides basic debounce/noise filtering. Firmware debounce is still recommended.
3. RGB Status LED
LED1: Everlight 19-237/R6GHBHC-A04/2T RGB LED.
Topology: Common anode tied to VOUT / 3.3 V.
GPIO current sink drive:
Red channel: ESP1:IO4 → R3 = 130 Ω → LED1 R
Green channel: ESP1:IO5 → R4 = 50 Ω → LED1 G
Blue channel: ESP1:IO6 → R5 = 50 Ω → LED1 B
Firmware implication: LED current can dominate average battery drain, so normal operating firmware should pulse the LED briefly and leave it off during sleep.
4. BOOT, EN, and USER Controls
EN / reset path:ESP1:EN, J1 pin 5, EN switch, R1 = 10 kΩ pull-up to VOUT, and C5 = 0.01 uF to GND.
BOOT path:ESP1:IO9, J1 pin 4, BOOT switch, R8 = 10 kΩ pull-up to VOUT, and C3 = 0.01 uF to GND.
USER input:ESP1:IO1, USER switch, and C6 = 0.01 uF to GND.
Additional pull-ups / exposed IO: R7 and R9 are 10 kΩ pull-ups associated with IO2 and IO8 nets.
5. Programming Header and Test Points
The design currently uses a 6-pin 2.54 mm header instead of onboard USB-C or an onboard USB-UART bridge. This means programming is intended through an external USB-UART/programmer fixture.
J1 mapping:
Table
J1 pin
Net / function
1
VOUT / 3.3 V
2
ESP_TX / ESP1:TXD0
3
ESP_RX / ESP1:RXD0
4
BOOT / ESP1:IO9
5
ESP_RST / ESP1:EN
6
GND
Test pads are present for additional probing access, including pads named 18_USB_DN and 19_USB_DP; however, the current design does not include a USB connector or onboard USB interface circuitry.
Signal Flow
The AA cell powers the battery input.
Q1 protects/conditions the battery input path.
IC1 and L2 boost the battery voltage to the regulated 3.3 V VOUT rail.
ESP1 boots from VOUT.
REED1 changes state as the magnet moves near or away from the sensor.
The reed network presents the state to the ESP32-C3 GPIO path.
Firmware wakes, debounces the input, reports the state over WiFi/BLE-capable firmware, and returns to sleep.
ESP1 can sink RGB LED current for short setup/status indications.
J1 provides UART programming/debug plus BOOT and EN control.
PCB Implementation
Board outline: Custom shape, nominal layout setup 38 mm × 64 mm.
Copper layers: 2-layer PCB.
Current placed PCB elements: 38 physical designators in the layout.
Routing state observed: Layout includes routed geometry, with 249 route segments, 152 vias, and 30 smart vias reported by the layout summary.
Main placement: BT1 dominates the board length; ESP1, IC1/L2 power stage, reed sensor, RGB LED, buttons, and J1 are arranged around the compact outline.
Density status: Current layout density is flagged as critical by the layout summary: component area is about 81% of board area, and routing congestion is concentrated around ESP1/J1/LED resistor regions.
Layer usage note: The summary reports all listed components on the top side except the Skral logo and several test points on bottom; the battery holder footprint heavily constrains usable routing area.
Key Design Choices and Trade-Offs
Single AA Cell + Boost Converter
Benefit: Field-replaceable, inexpensive, and easy for users to source. The boost converter keeps the ESP32-C3 rail at 3.3 V while the cell voltage is below 3.3 V.
Trade-off: WiFi current bursts are demanding for a single AA source. The boost converter, inductor, input/output capacitors, routing, and firmware duty cycle determine whether the system remains stable during RF bursts.
Reed Sensor Instead of Active Hall Sensor
Benefit: Ultra-low standby sensing current and simple magnetic actuation.
Trade-off: Mechanical reed behavior requires debounce handling and careful magnet alignment in the enclosure.
RGB LED Feedback
Benefit: Clear setup, pairing, open/closed, and error feedback.
Trade-off: LED current can dominate the average battery budget if not firmware-limited.
Header-Based Programming
Benefit: Simple, compact, and avoids USB connector/ESD/USB-UART cost.
Trade-off: Requires an external USB-UART adapter or programming fixture. The design is not currently a direct USB-pluggable product.
Compact 2-Layer PCB
Benefit: Low-cost PCB stackup and compact mechanical design.
Trade-off: High density increases routing difficulty and makes RF, ground return, and boost-converter layout quality more critical.
Current Review / Status Notes
The document has been updated to match the current ESP32-C3-MINI-1-N4 and AA-cell implementation.
The current automated check subset reports five floating RouteBranchPoint ERC warnings.
The selected review subset did not return current airwire, missing-footprint, missing-MPN, or missing-doc errors at the time of this update.
Layout density remains the main visible implementation risk: the board is compact and routing congestion is reported near ESP1, J1, and LED-related nets.
There is a schematic text note that says “Regular non-rechargeable AAA battery,” but the installed battery holder part is BH-AA-A1AJ020, and the project description/current BOM indicate a single AA cell. Treat the note as stale unless intentionally changed.
Firmware and Bring-Up Considerations
Recommended firmware behavior:
Configure low-power sleep as the default state.
Wake on reed state change or periodic housekeeping as required by the final protocol.
Debounce the reed input in firmware in addition to the RC network.
Keep RGB LED indications short and disable LED drive during normal sleep.
Use BOOT/EN and UART header for first programming and recovery.
Measure current in sleep, boot, WiFi/BLE advertising/association, transmit, and LED-on states.
Recommended bring-up checks:
Verify battery polarity and BAT+ behavior through Q1.
Confirm IC1 output is a stable 3.3 V on VOUT before installing or enabling firmware tests.
Check ESP1 EN behavior through the EN button and J1 pin 5.
Program over J1 UART using BOOT/EN sequencing.
Confirm reed state changes at the MCU input with magnet movement.
Pulse LED channels individually and verify current/brightness.
Measure RF-burst supply droop on VOUT with a short-ground oscilloscope probe.
Improvement Ideas
Near-Term
Rename or remove the stale AAA text note so the schematic consistently states AA.
Review the reed input net naming and ensure the intended MCU GPIO is clearly labeled in both schematic and firmware documentation.
Re-run full ERC/DRC after any routing or layout-rule edits.
Re-check ESP32-C3 antenna keepout against Espressif layout guidance.
Verify the TPS613221A layout against TI placement/current-loop recommendations.
Power Optimization
Use deep sleep aggressively and wake only on reed events or scheduled reporting.
Avoid long WiFi association periods; cache network credentials and optimize reconnect behavior.
Consider BLE reporting if the target hub supports it and lower average current is required.
Measure real boost efficiency and cell voltage sag under RF load.
Keep pull-up values high where timing allows, while validating GPIO leakage and wake reliability.
Production / Robustness
Add ESD protection if the programming header or test pads are user-accessible.
Add a production test procedure for 3.3 V rail, reed sensing, LED channels, UART programming, and current draw.
Consider test pads instead of the full 2.54 mm header if production size needs to shrink.
Validate enclosure magnet alignment and reed-switch orientation mechanically.
Confirm all selected MPNs and JLCPCB/LCSC assembly classes before ordering.
Summary
The current WiFi Door and Window Sensor is a compact AA-powered ESP32-C3-MINI-1-N4 contact sensor with TPS613221A boost power, PMOS input protection, reed magnetic sensing, RGB status indication, tactile BOOT/EN/USER controls, a 6-pin UART programming header, and a dense 2-layer PCB. The main strengths are low-power passive sensing, replaceable-cell operation, and simple programming access; the main risks are RF-burst power stability, dense PCB routing/placement constraints, and the need to keep documentation/firmware pin mapping synchronized with the latest schematic.