PCB Layout Conflict


I’ll open the attached text to see what you want done, then I’ll summarize or act based on its contents.
Created a project doc

Pinch Breakout REV A1 — Project Specification

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Breadboard adapter for the Moddo pinch connector/header pattern. The board adapts a central 2×8, 1.27 mm pitch male header to surrounding 2....
I created the project spec and renamed the project. Next I’m adding the through-hole headers and wiring the requested net map.
I’m blocked by a mechanical conflict in the pasted placement map: the left-column bottom hole is D5 at X=0, Y=0, while the bottom-row left hole is RST at the same X=0, Y=0, so two different nets occupy the same drill hole.
Completed so far:
To continue, I need one clarification: should the bottom row start at X=2.54 mm instead of X=0 so it does not overlap the left column, or is one of the listed corner nets incorrect?
Offset bottom row
Corner net correction
Fix overlap directly
Recheck after fix

Pinch Breakout REV A1 — Project Specification
Purpose
Breadboard adapter for the Moddo pinch connector/header pattern. The board adapts a central 2×8, 1.27 mm pitch male header to surrounding 2.54 mm through-hole breakout headers.
Mechanical Requirements
  • Board outline: 18 mm × 15 mm rectangle.
  • PCB stackup: 2 layers.
  • Mounting/assembly: all parts are through-hole; every pad must have a drill, no SMD pads.
  • Copper routing: 0.3 mm traces.
  • Bottom copper: GND pour.
  • Top silkscreen: net name at each breakout hole plus title text pinch Breakout / REV A1.
Parts
  • H1: male header, 2×8, 1.27 mm pitch; drill Ø0.65 mm, pad Ø1.0 mm.
  • J2, J3: male header, 1×6, 2.54 mm pitch; drill Ø1.0 mm, pad Ø1.7 mm.
  • J4: male header, 1×5, 2.54 mm pitch; drill Ø1.0 mm, pad Ø1.7 mm.
H1 Netlist

Table


H1 PinNet
13V3
2D0_SCL
3VBUS
4D1_SDA
5D7_MOSI
6D2
7D8_MISO
8D3
9D9_SCK
10D4
11D10_SS
12RST
13GND
14D5_TX1
15D11_DAC0
16D6_RX1
Breakout Placement Map
Coordinate datum: origin is the bottom-left breakout hole. 2.54 mm grid.
  • Left column, X = 0, bottom → top: D5, D6, D11, GND, D10, D9.
  • Right column, X = 15.24 mm, bottom → top: D1, D0, 3V3, VBUS, D7, D8.
  • Bottom row, Y = 0, left → right: RST, D4, GND, D3, D2.
  • H1 centered at (7.62 mm, ~4.75 mm), rows horizontal, pin 1 top-right; top row right → left: 1, 3, 5, …, 15.
Validation Criteria
  • All listed nets connect one H1 pin to the corresponding 2.54 mm breakout hole; GND connects to both breakout GND holes.
  • All component pads are plated through-hole with the specified drill and pad diameters.
  • Board is 18 mm × 15 mm, 2-layer, with 0.3 mm routing and a bottom GND pour.
  • No unresolved ERC/DRC issues after routing, or any remaining issues are documented.
  • Purpose

  • Mechanical Requirements

  • Parts

  • H1 Netlist

  • Breakout Placement Map

  • Validation Criteria