PCB Design for LED Project
Updated 1 document property
0:02
Set Documentation to "Power rails defined: BAT+ at J4:1 and U5:1; external arm switch connects U5:1(BAT+) to U5:2(LOAD+/LED_DRV_VIN). LOAD+ feeds I..."
0:00
1:35
Thinking deeply about your request.
Working on your request.
Analyzing the schematic.
Analyzing the PCB layout.
Checking board shape dimensions.
Working on your request.
Analyzing the PCB layout.
Considering the plan tool.
Working on your request.
Crafting execution plan.
Started implementing a plan
#Goal
- Complete the schematic by integrating all necessary BMS protection circuitry and proper wiring. This includes adding external protection components to the already placed BQ76930, ensuring the off-board arm switch (U5) is properly placed in series between BAT+ and LOAD+, disabling the LED during charging, and confirming that the PCB is correctly sized at 40 mm x 50 mm.
#Implementation plan
1. Complete BMS and protection circuitry:
1. Wire the 6S cell-tap connector (J3) to the BQ76930 (IC1) with all required filtering and support components.
2. Add required additional external components (MOSFETs, shunt resistor, and filter elements) as per the BQ76930 datasheet to safeguard CHG/DSG events and accurately sense current.
2. Configure power path and interlocks:
1. Define and label power rails: BAT+ (battery pack), protected pack rail, and LOAD+ (post-arm-switch).
2. Wire the off-board arm switch (U5) in series between BAT+ and LOAD+ ensuring that no bypass paths exist.
3. Implement charger and LED interaction:
1. Connect the charger (U2 BQ25750) to the correct battery nodes ensuring proper routing relative to the protection circuitry.
2. Add logic and/or control elements to disable the LED driver (U1 LT3756) during charging, incorporating charger status signals in addition to MCU control.
4. Confirm design details:
1. Verify that all floating pins are tied and every connection is correctly made.
2. Run ERC/DRC checks and update project notes to reflect final net names and design decisions.
3. Ensure that the PCB layout remains constrained within 40 mm x 50 mm.
#Success criteria
- The BMS protection circuitry fully integrates with the BQ76930 and added external components, ensuring safe CHG/DSG operation.
- The off-board arm switch is correctly wired in series between BAT+ and LOAD+ with no bypass paths.
- The LED driver is effectively disabled during charging intervals.
- The final schematic and layout respect the size constraint of 40 mm x 50 mm and pass ERC/DRC checks.
Task unable_to_complete.
6:12
Inspected schematic, layout, and reviews
0:42
Started: Inspecting current schematic and BMS wiring
Analyzing the PCB layout.
Accessing knowledge base.
Added BMS external components and filters
2:25
Started: Adding BQ76930 external FETs and filters
Searching library for: "Back-to-back N-channel MOSFETs for 6S Li-ion battery protection CHG/DSG path, at least 30V Vds, low Rds(on) in SO-8 or PowerPAK, suitable for battery disconnect at a few amps, prefer widely available parts"
Searching library for: "Low-ohmic current sense resistor 2512 around 5 mOhm to 20 mOhm for battery pack current measurement (few amps) for BQ76930 SRP/SRN, 1% or better"
Searching library for: "Small signal NPN transistor SOT-23 for pulling LT3756 SHDN low from charger STAT output, include base resistor, used as hardware interlock"
Creating search plan for: "Low-ohmic current sense resistor 2512 around 5 mOhm to 20 mOhm for battery pack current measurement (few amps) for BQ76930 SRP/SRN, 1% or better --- MANDATORY search constraints (these MUST be applied to all searches): fieldCategories: ["core","type","packaging","manufacturer","availability","specifications"] hitsPerPage: 5"
Creating search plan for: "6S BMS NTC thermistor 10k 3435K 1% 0603 or 0805 for BQ76930 TS1 input, plus bias resistor --- MANDATORY search constraints (these MUST be applied to all searches): fieldCategories: ["core","type","packaging","manufacturer","availability","specifications"] hitsPerPage: 5"
Searching: "10 kΩ NTC thermistor B3435 1% 0603 or 0805 for BQ76930 TS1 battery temperature sense"
Found 15 results.
Searching: "N-channel MOSFET suitable for back-to-back battery protection on a 6S Li-ion pack (up to ~25V nominal, require Vds >= 30V), low Rds(on) for a few amps continuous, package: SO-8 or PowerPAK (SMD), widely available manufacturers (ON, ST, Vishay, Infineon), prefer through-rail switching for CHG/DSG paths"
Searching: "Low-ohmic current sense resistor in 2512 SMD package, 5 to 20 milliohm, 1% tolerance, for few-amp battery pack current measurement (BQ76930 SRP/SRN)"
Found 5 results.
Searching: "Back-to-back N-channel MOSFETs for 6S Li-ion battery protection CHG/DSG path, at least 30V Vds, low Rds(on) in SO-8 or PowerPAK, suitable for battery disconnect at a few amps, prefer widely available parts --- MANDATORY search constraints (these MUST be applied to all searches): fieldCategories: ["core","type","packaging","manufacturer","availability","specifications"] hitsPerPage: 5"
Searching: "Low-ohmic current sense resistor 2512 around 5 mOhm to 20 mOhm for battery pack current measurement (few amps) for BQ76930 SRP/SRN, 1% or better --- MANDATORY search constraints (these MUST be applied to all searches): fieldCategories: ["core","type","packaging","manufacturer","availability","specifications"] hitsPerPage: 5"
Searching: "Small signal NPN transistor SOT-23 for pulling LT3756 SHDN low from charger STAT output, include base resistor, used as hardware interlock --- MANDATORY search constraints (these MUST be applied to all searches): fieldCategories: ["core","type","packaging","manufacturer","availability","specifications"] hitsPerPage: 5"
Searching: "N-channel MOSFET 30V or higher, low Rds(on), SO-8 or PowerPAK package, suitable for back-to-back battery CHG/DSG switching at a few amps, manufacturers: ON, ST, Vishay, Infineon"
Searching: "Back-to-back N-channel MOSFETs for 6S Li-ion battery protection CHG/DSG path, at least 30V Vds, low Rds(on) in SO-8 or PowerPAK, suitable for battery disconnect at a few amps, prefer widely available parts --- MANDATORY search constraints (these MUST be applied to all searches): fieldCategories: ["core","type","packaging","manufacturer","availability","specifications"] hitsPerPage: 5"
Finished searching for components.
Added 22 components
0:12
Added 2x DMN3008SFG as Q1, Q2 (Pins: S::2, D, S::3, G, S::1)
Added 1x HoJLR2512-3W-10mR-1% as R9 (Pins: 1, 2)
Added 1x MMBT3904LT1G as Q3 (Pins: E, B, C)
Added 1x ERT-J1VG103FA as U6 (Pins: P1, P2)
Added 10x Generic Resistor as R10, R11, R12, R13, R14, R15, R16, R17, R18, R19 (Pins: P2, P1)
Added 7x Generic Capacitor as C12, C13, C14, C15, C16, C17, C18 (Pins: P1, P2)
Wired shunt, FETs, taps, and interlock
1:29
Started: Wiring BQ76930 to taps, shunt, and FETs
Analyzing the schematic.
Updated 24 connections
0:56
Connected J4:2, R9:2, Q2:S, Q2:S, Q2:S, IC1:SRN, R9:2, J3:Pin_1, C12:P2, C13:P2, C14:P2, C15:P2, C16:P2, C17:P2, IC1:VC0, U6:P2 to ^PACK_B-
Connected R9:1, Q1:D, Q2:D, Q1:S, Q1:S, Q1:S, IC1:SRP, R9:1 to ^PACK_P-
Connected IC1:DSG, Q1:G to ^DSG_GATE
Connected IC1:CHG, Q2:G to ^CHG_GATE
Connected J4:1, U5:1, IC1:BAT, IC1:REGSRC to ^PACK_B+
Connected U5:2, U1:VIN, IC2:VIN, C4:P1, R11:P1 to ^LOAD+
Connected J3:Pin_2, R13:P1 to ^CELL1P
Connected R13:P2, C12:P1, IC1:VC1 to ^Net 4
Connected J3:Pin_3, R14:P1 to ^CELL2P
Connected R14:P2, C13:P1, IC1:VC2 to ^Net 5
Connected J3:Pin_4, R15:P1 to ^CELL3P
Connected R15:P2, C14:P1, IC1:VC3 to ^Net 6
Connected J3:Pin_5, R16:P1 to ^CELL4P
Connected R16:P2, C15:P1, IC1:VC4 to ^Net 7
Connected J3:Pin_6, R17:P1 to ^CELL5P
Connected R17:P2, C16:P1, IC1:VC5 to ^Net 8
Connected J3:Pin_7, R18:P1 to ^CELL6P
Connected R18:P2, C17:P1, IC1:VC6 to ^Net 9
Connected IC1:REGOUT, R12:P1 to ^REGOUT
Connected U6:P1, IC1:TS1, R12:P2 to ^TS1
Connected U2:STAT1, R10:P1 to ^CHG_ACTIVE
Connected R10:P2, Q3:B to ^Net 10
Connected Q3:E to ^GND
Connected Q3:C, U1:~SHDN~/UVLO, R11:P2 to ^LED_SHDN_HARD
nets {
net USB_5V = U2:ACP, IC3:VOUT_3, IC3:VOUT_2, IC3:VOUT_1, L3:P2, U2:ACN, J1:VBUS__1, J1:VBUS, IC3:VIN, C5:P1, C7:P1, U2:VAC, R5:P2, C8:P1;
net GND = IC2:GND, U3:GND_1, IC3:AGND, C8:P2, R1:P2, C5:P2, U2:17, U2:22, IC1:VSS, R2:P2, J1:SHELL_GND__3, J1:SHELL_GND__2, J1:SHELL_GND__1, J1:SHELL_GND, J1:GND__1, J1:GND, J2:1, J2:3, C4:P2, U1:GND, C3:P2, C2:P2, R7:P2, C1:P2, C9:P2, C7:P2, C10:P2, C11:P2, R8:P2, CN1:2, R6:P2, IC3:PGND, U3:GND_2, U4:VSS, IC2:EPAD;
net I2C_SCL = U2:SCL, IC1:SCL, U4:PA9;
net CHG_STAT2 = U2:STAT2, U4:PA3;
net LED_PWM = U4:PA8, U1:PWM;
net I2C_SDA = U4:PA10, IC1:SDA, U2:SDA;
net USB_PG = U2:_PG, U4:PA4;
net PACK_B- = J4:2, U6:P2, IC1:VC0, C17:P2, C16:P2, C15:P2, C14:P2, C13:P2, C12:P2, J3:Pin_1, IC1:SRN, Q2:3, Q2:2, Q2:1, R9:2;
net PACK_P- = R9:1, IC1:SRP, Q1:3, Q1:2, Q1:1, Q2:D, Q1:D;
net DSG_GATE = IC1:DSG, Q1:G;
net CHG_GATE = IC1:CHG, Q2:G;
net PACK_B+ = J4:1, IC1:REGSRC, IC1:BAT, U5:1;
net LOAD+ = U5:2, R11:P1, C4:P1, IC2:VIN, U1:VIN;
net CELL1P = J3:Pin_2, R13:P1;
net Net 4 = R13:P2, IC1:VC1, C12:P1;
net CELL2P = J3:Pin_3, R14:P1;
net Net 5 = R14:P2, IC1:VC2, C13:P1;
net CELL3P = J3:Pin_4, R15:P1;
net Net 6 = R15:P2, IC1:VC3, C14:P1;
net CELL4P = J3:Pin_5, R16:P1;
net Net 7 = R16:P2, IC1:VC4, C15:P1;
net CELL5P = J3:Pin_6, R17:P1;
net Net 8 = R17:P2, IC1:VC5, C16:P1;
net CELL6P = J3:Pin_7, R18:P1;
net Net 9 = R18:P2, IC1:VC6, C17:P1;
net REGOUT = IC1:REGOUT, R12:P1;
net TS1 = U6:P1, R12:P2, IC1:TS1;
net CHG_ACTIVE = U2:STAT1, R10:P1;
net Net 10 = R10:P2, Q3:B;
net GND = Q3:E, GND:GND;
net LED_SHDN_HARD = Q3:C, R11:P2, U1:~SHDN~/UVLO;
}
Task unable_to_complete.
1:22
Started: Fixing remaining BQ76930 VC wiring and board sizing
Analyzing the PCB layout.
Running design review.
Analyzing the PCB layout.
Updated 1 layout rule
0:08
Set Layout's unit to "mm"
Set Layout's sizeX to "40"
Set Layout's sizeY to "50"
0:00
Reviews
Properties
Pricing & Availability
Distributor | Qty 1 |
|---|---|
Arrow | $22.81–$22.89 |
Digi-Key | $29.14–$30.30 |
LCSC | $48.46 |
Mouser | $35.43 |
TME | $22.75 |
Verical | $6.09–$11.12 |
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